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If you are an insider with an outsider prospect it was obvious, sad the BoD and leadership was so insular and there was no Andy line personality there. TBH, an Andy like character would have been shoved aside if he spoke his any other but x86 prospective, simply no other one allowed. Even now it’s Pat’s that is it!
If you are an insider with an outsider prospect it was obvious, sad the BoD and leadership was so insular and there was no Andy line personality there. TBH, an Andy like character would have been shoved aside if he spoke his any other but x86 prospective, simply no other one allowed. Even now it’s Pat’s that is it!
I'm not so sure Andy Grove could have spared Intel either. Sometimes Andy's judgement was skewed by Intel's business model from his time, and not so great. Grove's fascination with peer-to-peer computing, was a distraction on the way to cloud computing by someone (and supported by Bill Gates no less) who was simply fixating on his then-current PC-based business model:
This layoff seems worrisomely planned. Unless I am mistaken, it appears that first there are optional early retirement followed by actual firings. Seems like a great way to drag out the whole pain while making employees on knife’s edge thinking that they may be next. I can’t imagine this past month much work was accomplished at Intel. Google’s firings were far better handled with the results known the next day and severance packages which were appropriately sized for experience. It was still painful but at least their teams were able to move on and get to work.
Doing some quick and dirty math based on internet sources (sketchy I know) indicates that much of Intel's problem in being cost competitive isn't the cost of labor, it is the amount of labor. Numbers for 2020 show Intel with 884K wafer start per month capacity and roughly 55000 employees in manufacturing (Intel states ! 50% of their workforce is involved in the manufacturing processes). Numbers for TSMC show 2,719K wafer start per month capacity and 56000 employees. This give about a 3x advantage in wafer starts per employee for TSMC.
While there are certain OSHA restrictions that will cause Intel (and US TSMC facilities) to have higher headcount, that doesn't account for a 3x delta. My assumption is that while Intel was maintaining technical leadership through shear brute force (i.e. headcount), TSMC was developing automated systems that allow them to do more with less. When the wheels fell off the bus at Intel they could no longer afford that level of brute force and are now having to align more closely to the TSMC model. Unfortunately, they haven't spent the last several decades investing in the automation systems that allow TSMC to run this efficiently. It is likely to get uglier before it gets better.
"Numbers for TSMC show 2,719K wafer start per month capacity and 56000 employees. "
I think we need to consider the wafer sizes (300mm, 200mm, or less) for the monthly wafer output from TSMC.
Based on the TSMC annual reports and 300mm/12-inch wafer calculation, below is the TSMC annual wafer shipment history. It's about 1 million 12-inch equivalent wafers per month in 2023. The annual capacity across all TSMC fabs is more than 16 million 12-inch equivalent wafers in 2023.
To butcher the proverb, “When all you have is a (high margin) hammer, everything (all workloads) looks like a nail”. Worked for Intel with servers, but not graphics or AI. Questionable for HPC.
