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Sierra Forest was on Time as they said H1 so I will give them benifit of doubt but Clearwater Forest is going to have upgraded Skymont Cores called Darkmont and they are extremely amazing from the Presentation at Computex comparison against RPC used in emerald rapids
Sierra Forest was on Time as they said H1 so I will give them benifit of doubt but Clearwater Forest is going to have upgraded Skymont Cores called Darkmont and they are extremely amazing from the Presentation at Computex comparison against RPC used in emerald rapids View attachment 2083
It's interesting that E cores are comparable to previous gen P cores(redwood cove's performance is also similar to raptor cove). But we still need to see, since they're drastically increasing the number of chiplets in the system. Sierra forest consists of 4 chiplets, but now whooping 15.
Single core performance for Skymont is indeed impressive; however, I am starting to hear and see leaks of Arrow Lake and analysis from Lunar Lake that are showing depressing latency around the ring bus. I have heard rumors that the latency may get worse with more nodes added around the bus.
None of this may have too profound an effect on desktop and laptop CPU's, but seems like a fatal limitation in data center.
Still, there is time between now and Clearwater forest for Intel to clean up any architectural issues with the base design. And while 18A may not be a home run vs N3P (or N2) with respect to traditional node metrics, the added chip layout efficiencies associated with BSPD may well turn out to show impressive die shrink capabilities overall.
Single core performance for Skymont is indeed impressive; however, I am starting to hear and see leaks of Arrow Lake and analysis from Lunar Lake that are showing depressing latency around the ring bus. I have heard rumors that the latency may get worse with more nodes added around the bus.
Still, there is time between now and Clearwater forest for Intel to clean up any architectural issues with the base design. And while 18A may not be a home run vs N3P (or N2) with respect to traditional node metrics, the added chip layout efficiencies associated with BSPD may well turn out to show impressive die shrink capabilities overall.