Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/intel-14nm.8306/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2020970
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Intel 14nm+

Jozo035

Member
Intel just announced Kabylake processors built on 14nm+ process with relaxed gate pitch...

And i do not know, what should i think about this. Intel was aimed on dimensions speaking about their process and now bigger pitch is better?

Or this is not "real 14nm"? Is that mean, that this is something like 14nm+1 = 15nm process?

I just don't understand. Can someone explain this?
 

Portland

Active member
I know it's a 3% performance increase. So for me it's a pass but I do think cannonlake will be the best out there.
 

CharlesC

New member
Okay.. I'll take a little time and throw a few things out there

1) Performance of a CPU or circuit block depends on many factors; drive current, interconnect capacitance, gate capacitance, leakage junction and transistors. We know that smaller gate length usually means lower gate capacitance, higher drive, but with much optimization around S/D engineering and contacts to get all that goodness.
2) For density everyone wants tightest gate/contact pitch which means shrinking gate length ( good for drive current ), but shrinking contacts increase contact resistance.
3) Decreasing gate length while controlling transistor leakage requires optimizing the S/D which usually means very steep heavily doped and shallow junctions and higher resistance. A longer gate length transistor allows deeper junctions, lower resistance while still achieving possible the same or even higher drive current with similar or lower transistor and junction leakage.

Since Intel said they increased FIN height they must not be limited by gate capacitance, likely with interconnect being more and more an issue for high performance, large chip designs. Thus if they are limited more by interconnect they could choose to increase fin height ( width) gate capacitance getting more drive / area, then why not also increase great length ( gate capacitance too ), by doing so they can also re-engineer the S/D to be lower resistance which also usually means lower junction leakage, longer gate length also means lower transistor leakage and they can re-optimize everything for the product. Since this is third generation design they should know well what paths are gate dominated and not change those, those that are BE dominated leverage the new transistors to make that path faster with little increase in junction / transistor leakage by swapping to longer transistor lengths, viola a band-aid before 10nm comes.
 

Daniel Payne

Moderator
Astilo,

Just a few corrections and clarifications.

1) The pitch of metal or poly layers is not related in any way to the voltage used by the process. Voltage is limited by the Vt of the FinFET transistors.

2) Fin height is not related in any way to the pitch. Fin height is in the Z axis for FinFET transistors, while the pitch for metal and poly layers is in the X and Y axis.

3) Clock performance specified in GHz or MHz is related to several factors: current drive strength of FinFET transistors, parasitic resistance and capacitances of FinFET transistors and interconnect, routing density, crosstalk between adjacent interconnect, voltage levels, temperature, process corner.
 

lefty

Member
Cannonlake was ment to be released this year, but it got delayed because the 10nm process got delayed. But Intel has to release an update every year, so the cheapest way to do this was to tweak the 14nm node and make it faster (albet at the cost of die area). Basically, Kabylake is a Skylake refresh.
 

Jozo035

Member
Thank you all for answers, i have any ee background so i can imagine how ideal transistor looks like, so i asked about different aspect.

After Samsung delivered 14nm products in big quantities before Intel, Intel started talking about "the only real process". And all this was based on on comparison of these 2 numbers.

We even have nice table on this: http://cdn.overclock.net/0/0c/500x1000px-LL-0c997421_3c162f8d_6.jpeg

I have seen 100's of articles repeating, that only these numbers matters, this is better for Intel, Intel is real process and others are actually 18-20nm...

Even here are articles repeating, that foundry has no real 14/16nm and only 10nm will be comparable with Intel 14nm.

And now they just changed their mind? Forget about last lies, now bigger pitch is better.

Or Intel just admitted, that their 14nm was wrong, and foundry processes was better all the time?

Can we still call it 14nm? Why not 15nm?

Didn't they just ruined their foundry marketing?

...

Sorry, i just don't understand, and i am completely shocked from what Intel is recently doing.
 

Li Yisuo

Member
4k needs bigger, cooler, stronger and more reliable SRAM. So why not getting a bigger pitch. I think it is just for market orientation.
 

Daniel Payne

Moderator
Thank you all for answers, i have any ee background so i can imagine how ideal transistor looks like, so i asked about different aspect.

After Samsung delivered 14nm products in big quantities before Intel, Intel started talking about "the only real process". And all this was based on on comparison of these 2 numbers.

We even have nice table on this: http://cdn.overclock.net/0/0c/500x1000px-LL-0c997421_3c162f8d_6.jpeg

I have seen 100's of articles repeating, that only these numbers matters, this is better for Intel, Intel is real process and others are actually 18-20nm...

Even here are articles repeating, that foundry has no real 14/16nm and only 10nm will be comparable with Intel 14nm.

And now they just changed their mind? Forget about last lies, now bigger pitch is better.

Or Intel just admitted, that their 14nm was wrong, and foundry processes was better all the time?

Can we still call it 14nm? Why not 15nm?

Didn't they just ruined their foundry marketing?

...

Sorry, i just don't understand, and i am completely shocked from what Intel is recently doing.

In the early days of IC process design the MOS transistors had a channel length, like 6um, so the process name was called 6um. That continued for several years, but then the marketing departments got involved in naming new process nodes which are not related to any physical measurements. So to compare two competing 14nm process nodes you have to look at measurable numbers like Metal 1 pitch, and Poly pitch. Some in our industry are starting to multiply the Metal 1 pitch x the Poly pitch as a better metric.
 
Last edited:

astilo

New member
Hi Daniel, are you correcting Intel quote or Anandtech report? Just curious :rolleyes:

That said, point 1 is really irrelevant (and partially wrong, since channel length does affect Vt). Intel was simply talking about Fins, taller and wider in 14nm+ (nobody mentioned metal or poly pitches here).
Point 2, not sure where you got such a reference about a correlation between Fin height and pitch (???). I do not want to be polemic, but it looks like you were replying to a complete different post (maybe what's a 3D xtor?).
Point 3, fine, but that's neither a correction nor a clarification. It is just a different statement. Intel is expecting to squeeze a couple of hundreds Mhz more from the 14nm+ tech node. If I look at their released Kaby Lake parts (specifically at the turbo boost frequency), they really achieved it.

Skylake - m7-6Y75 (1.2Ghz Base, 3.1Ghz Turbo)
Kaby Lake - i7-7Y75 (1.3Ghz Base, 3.6Ghz Turbo)


Astilo,

Just a few corrections and clarifications.

1) The pitch of metal or poly layers is not related in any way to the voltage used by the process. Voltage is limited by the Vt of the FinFET transistors.

2) Fin height is not related in any way to the pitch. Fin height is in the Z axis for FinFET transistors, while the pitch for metal and poly layers is in the X and Y axis.

3) Clock performance specified in GHz or MHz is related to several factors: current drive strength of FinFET transistors, parasitic resistance and capacitances of FinFET transistors and interconnect, routing density, crosstalk between adjacent interconnect, voltage levels, temperature, process corner.
 

Jozo035

Member
astilo: Look at Samsung:
Exynos 7420 (14LPE): 1.5, 2.1 GHz
Exynos 8890 (14LPP): 2.3, 2.6 GHz

And i will repeat myself: Is Intel's 14nm+ process still 14nm by Intel metrics?

In the early days of IC process design the MOS transistors had a channel length, like 6um, so the process name was called 6um. That continued for several years, but then the marketing departments got involved in naming new process nodes which are not related to any physical measurements. So to compare two competing 14nm process nodes you have to look at measurable numbers like Metal 1 pitch, and Poly pitch. Some in our industry are starting to multiply the Metal 1 pitch x the Poly pitch as a better metric.
I guess it is not correct metric to determine better process anymore, right?
 

astilo

New member
astilo: Look at Samsung:
Exynos 7420 (14LPE): 1.5, 2.1 GHz
Exynos 8890 (14LPP): 2.3, 2.6 GHz

And i will repeat myself: Is Intel's 14nm+ process still 14nm by Intel metrics?


I guess it is not correct metric to determine better process anymore, right?
Jozo035, just forget the technology node name, we all know that it is misleading and not really representative of any Xtors physical dimension. Even worse, you cannot compare nodes across different foundries/IDMs. The only thing that remains true is that a newer node is denser than the previous one. So Intel's 22nm less dense than 14nm less dense than 10nm and so on.
The 14LPP is indeed better than the 14LPE (2nd gen FinFETs), but in terms of power consumption and speed, density is pretty much the same.

Is Intel's 14nm+ process still 14nm by Intel metrics?
To me it is. The density loss is most likely negligible and the performance is better. Being Intel, would you have called it 15nm? Why? You can't compare it anyway with the SEC/GF 14LPP or the TSMC 16FF+, since the Intel 14nm+ is still denser than those.

Some in our industry are starting to multiply the Metal 1 pitch x the Poly pitch as a better metric.
I guess it is not correct metric to determine better process anymore, right?
I still prefer to look at the smallest SRAM cell size for logic, but to be fair, there is no "right metric" out there. Foundries do not have to be as aggressive as IDMs, since they need a process that can fit multiple customers designs. We were in fact skeptical about the possibility for Intel to easily adapt their 14nm CPU process for the foundry business. Perhaps the 14nm+ would be easier to digest.

You can have a look at this topic to have a better idea about the current logic dimensions:
https://www.semiwiki.com/forum/content/3884-who-will-lead-10nm.html
 

Daniel Nenni

Admin
Staff member
This was a very good discussion, thank you all. I was told that the new Intel 14nm process is also a cost reduction (less masks). Has anybody else heard this?

Either way this does not bode well for the AMD 14nm Zen part. I'm also told that AMD will stick with GF meaning they will skip 10nm and jump to GF 7nm in 2018.

If so, AMD will not have a truly competitive Zen part until 2018 at the earliest? Will AMD have enough cash to survive until then?
 

astilo

New member
Either way this does not bode well for the AMD 14nm Zen part. I'm also told that AMD will stick with GF meaning they will skip 10nm and jump to GF 7nm in 2018.
If so, AMD will not have a truly competitive Zen part until 2018 at the earliest? Will AMD have enough cash to survive until then?
I have seen some early benchmarks of the AMD Summit Ridge CPU (ZEN based) and they look very promising (mass production expected in Q1 2017). If they can price it below the Intel parts, they can gain some decent market share. Adding also the new ATI RADEON GPUs (the mid segment ones, RX460-470-480, are already on the shelves) and the Gaming chips into the equation, I definitely think that the 2017 is going to be a good year for AMD. Intel will also start to sell the Kaby Lake desktop CPUs beginning of 2017, so I truly do not expect any Cannonlake 10nm volume parts before mid-end of 2018. And then it could really be Intel 10nm vs AMD 7nm, not a very comfortable spot for Chipzilla.
 

Daniel Nenni

Admin
Staff member
Don did a nice write up of the Intel vs AMD saga.

https://www.semiwiki.com/forum/content/6152-zen-art-microprocessor-maintenance.html

I really do think competition is important and AMD made Intel a stronger company. Unfortunately AMD has not pushed Intel technically for many years now and it shows. In my opinion AMD is making a big mistake prematurely rattling the Zen sabers in front of Intel. They really are angering a once restful microprocessor giant.
 

Fred Chen

Moderator
Gate pitch reduction could reduce the silicon strain, i.e., performance. I wonder if they are offering this as a second 14nm flavor instead of as a replacement of earlier 14nm. Indeed it's a little unexpected after the 10nm announcement.
 
Last edited:

Fottemberg

New member
AMD is not rushing Zen. ;)
Also, Zen will integrate a lot of Power features, which will make less important silicon Intel advantage. :)
 
Top