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DVCon Europe 2019 to be held on 29th and 30th October in Munich

Daniel Payne

View attachment 23197
Scope broadened to include embedded software. Calls for papers, tutorials and panels issued.

Munich, Germany – March 21st, 2019 - The Design and Verification Conference & Exhibition Europe (DVCon Europe), sponsored by Accellera Systems Initiative, has announced the call for papers, tutorials and panels for the next conference, which will be held at the Holiday Inn Munich City Centre, on October 29th and 30th, 2019. This year sees the conference broadening its scope by welcoming contributions covering embedded software, and there will be a new session on model-based and model-supported software design. Deadlines for initial abstracts are April 9[SUP]th[/SUP] (for papers) and April 23[SUP]rd[/SUP](tutorials and panels).

The event is in its sixth year and grew 20% in 2018. Following successful co-location last year, the SystemC Evolution Day will again be held at the same venue, on October 31[SUP]st[/SUP].
This year’s General Chair of the Steering Committee is Joachim Geishauser, of NXP Semiconductor, who is based in Munich. Geishauser has played an active role since the launch of DVCon Europe, having acted as Panel Chair and Tutorial Chair in previous years. As a Senior Staff Engineer at NXP Semiconductor, Geishauser is a verification methodology lead and has published several papers.

“In the past five years, DVCon Europe has grown into a well-respected conference; its credibility enhanced by that fact that it is developed by users, for users,” noted Geishauser. “This year, to address the multi-disciplinary challenges our industry is facing, DVCon Europe will broaden its scope in the call for papers and tutorials, by including embedded software. As chair of DVCon Europe 2019, I encourage embedded software developers to come to the conference to share their challenges and get to see what the hardware side is working on.”
The 2019 conference invites papers, tutorials and panels on a range of subjects, including special interest areas such as digital twin, machine learning, RISC-V, next generation automotive and 5G.

The new session on model-based and model supported software design joins existing topics such as Electronic System Level (ESL) design, verification and validation; Intellectual Property (IP) reuse and design automation; functional safety and security; mixed signal and low power design and verification: underlining DVCon Europe’s commitment to the examination and discussion of design and verification methodologies and standards.

For more information on submissions including the submission portal, please visit

The Design and Verification Conference & Exhibition in Europe (DVCon Europe) is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, and one of several DVCon events around the globe (see below), DVCon Europe brings chip architects, design & verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design. For more details, visit Follow #dvconeurope on Twitter.

DVCon China will take place at the Crowne Plaza Hotel Century Park, Shanghai on April 17th, 2019. DVCon India is to be held at the Radisson Blu Bengaluru, Bangalore on 25[SUP]th[/SUP] and 26[SUP]th[/SUP] September 2019. DVCon U.S. will be held at the DoubleTree, San Jose from March 2[SUP]nd[/SUP] to 5[SUP]th[/SUP] 2020.

Accellera Systems Initiative (Accellera) is an independent, not-for profit organization, dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit For membership information, please email Follow @accellera on Twitter or to comment, please use #accellera.
ACCELLERA GLOBAL SPONSORS: Cadence; Mentor, A Siemens Business; Synopsys
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Accellera Systems Initiative and DVCon are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.

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