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Does most industry tools have the feature to effectively implement multi-supply volt

C

chuzhufei

Guest
Does most industry tools have the feature to effectively implement MSV (multi-supply voltage) technique in current design flow yet?

Thanks for your comments!
 
Does most industry tools have the feature to effectively implement MSV (multi-supply voltage) technique in current design flow yet?

I do know that at our side Cadense CPF flow is being used for production chips.
 
Not really. The CPF/UPF stuff can drive synthesis, but there's no downstream support until you get to fast Spice. I've been campaigning for adding support for verification of power-managed designs to Verilog-AMS for years, but they're mostly analog guys that don't have that problem. The SystemVerilog committees also seem to be in denial and are avoiding anything with the smell of analog.
 
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