Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/do-modern-nodes-make-fpgas-more-or-less-attractive-to-replace-%E2%80%9Cold%E2%80%9D-asics.16314/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021171
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Do modern nodes make FPGAs more or less attractive to replace “old” ASICs?

Xebec

Active member
(Curiosity) Question -

Assuming you don’t have very high performance needs (i.e. a lot of transistors at high speed and/or low power), I think that FPGAs vs ASIC is generally a volume and cost decision. With a lot of focus on ‘very old’ nodes being used by automakers and such, and hints from foundries that they want those designers to switch to more modern nodes for their ASICs - is there a point where a super cheap, but modern fabbed FPGA could be used to replace those old ASICs instead?

.. or does this never make sense if you have any substantial volume (say 100K+ units, of any size)? I.e. Even though the cost per transistor is a lot lower on say a 14nm node than a 130nm node, the difference between the two nodes doesn’t allow the FPGA cost to drop sufficiently to make up for it? (I.e. FPGA on a ‘modern’ process - sub-28nm vs. an ASIC on 130nm or so).

Is there another type of ‘generic programming logic chip’ besides FPGA that might bridge a gap like that? I.e. ‘just buy this [non-ASIC] chip on a modern node “for cheap” vs. design your own ASIC on that modern node dealing with mask, yield respins, and other unique costs?.
 

blueone

Well-known member
I posted this paper from Microsoft in another thread, but starting on page 4 it includes some reasoning about why Microsoft chose an FPGA implementation for the Azure smartNIC.


In this case Microsoft's volumes are large (millions of units), but the flexibility of FPGAs to be reprogrammed was a big factor, because network protocols and server virtualization architectures are still in a development stage of relatively fast evolution.

The paper does not discuss the introduction of FPGA development environments like Intel's oneAPI, which support FPGA programming in a version of C++. This allows software developers to program FPGAs, which is a huge step forward. I was recently exchanging email with a friend in the HPC field, and he claims many HPC users have an interest in FPGAs for selected algorithms. He also said that there's quite a bit of interest in CXL-connected FPGAs, which is on every FPGA vendor's roadmap. FPGAs still look like a niche to me, but it does look like in the next few years FPGAs will be a substantially larger niche than they are today.
 
Top