Die Yield Calculator

[Fred Chen]

This is a neat site for die yield calculations: http://cloud.mooreelite.com/tools/die-yield-calculator/index.html

 

[Fred Chen]

Yield can drop by a half for those large NVIDIA dies.

 

[Barnsley]

This looks like the software our customer uses to send us their 1X mask layouts

 

[Xebec]

Yield can drop by a half for those large NVIDIA dies.

Doesn’t that sort of depend on what Nvidia can / can’t fuse off during testing/packaging?

Example: RTX 4090 is taken from the AD102 die — 609mm2. The full die physically has 18,432 CUDA cores, but the 4090 version only has 16,384 enabled. Retail 4090s are also clocked about 15% lower than what the AD102 silicon is capable of at +/- standard voltages.

 

[nghanayem]

Doesn’t that sort of depend on what Nvidia can / can’t fuse off during testing/packaging?

Example: RTX 4090 is taken from the AD102 die — 609mm2. The full die physically has 18,432 CUDA cores, but the 4090 version only has 16,384 enabled. Retail 4090s are also clocked about 15% lower than what the AD102 silicon is capable of at +/- standard voltages.

From a foundry perspective it is a dead die, as most products are not repairable or binnable. Repair and recovery is something the customer does after the wafer leaves the fab.

 

[Xebec]

From a foundry perspective it is a dead die, as most products are not repairable or binnable. Repair and recovery is something the customer does after the wafer leaves the fab.

Gotcha. and do foundry customers usually pay 'per wafer' with some kind of "guarantee" on die yield then? (and is die yield defined as 100% working at a certain frequency -- an agreement definition that the customer and foundry come up with together?)

If yes, is it then up to the customer to determine whether they want the foundry to throw away the die or potentially stockpile them for sorting and (much lower) binning later?

AMD for example does a lot of this down heavy binning on CPUs and GPUs -- sometimes a full year after the initial product is released.

Sorry for naive questions here - just trying to understand a bit more when foundry industry talks 'yield'.

 

[BruceA]

Some companies do die buy, some do wafer buy. Foundry always have some yield and performance commitments.

Almost all big cache have some redundancy. Depending on company and product line up there is always the possibility to down bin CPU and GPU cores for certain markets and applications.

As always YMMV

 

[nghanayem]

Gotcha. and do foundry customers usually pay 'per wafer' with some kind of "guarantee" on die yield then? (and is die yield defined as 100% working at a certain frequency -- an agreement definition that the customer and foundry come up with together?)

If yes, is it then up to the customer to determine whether they want the foundry to throw away the die or potentially stockpile them for sorting and (much lower) binning later?

AMD for example does a lot of this down heavy binning on CPUs and GPUs -- sometimes a full year after the initial product is released.

My understanding is that in your example, AMD gets a promise from TSMC that Xtor layouts will have properties matching the PDK, variation will be within some range, and that defect density will be at some value or better (assuming AMD colors inside the lines). Actual yield is die size dependent and also likely content dependent (for example, maybe the SRAM has better or worse DD than the logic). Once wafer reach the EOL the wafers are sent to AMD who will then send them to an OSAT. The OSAT will sort/test their wafers (my understanding is that not every fabless firm will do that). Assuming there is repair circuitry, some of the defective dies can be fixed. AMD will then decide how to bin the dies based on the within wafer and wafer to wafer variations. A company like AMD will bin aggressively, while a QCOM will pick bins that are very easy for many chips to hit. From there the OSAT (not necessarily the same one) does wafer dicing, packaging (assuming we are talking about any AMD product that isn't V-cache or MI-300x), and then package test.

Sorry for naive questions here - just trying to understand a bit more when foundry industry talks 'yield'.

When a foundry ever says yield percent, it is on a specific test chip (often with very high SRAM content). Yield on a customer chip probably comes up when engineers from the customer and foundry are talking about their chip. But when fab people are talking among themselves, yield % is a completely meaningless number because of the above reasons. In that case it is all about device characteristics vs the target, defect density, ring oscillator performance, variation, and the like.

 

[laurchar]

There is also an Android application to evaluate those yield and gross die data :
https://play.google.com/store/apps/details?id=com.charrier.laurent.gross_die_yield_1