[content] => 
    [params] => Array
            [0] => /forum/index.php?threads/call-for-papers-electronic-design-process-symposium-monterey-ca.1208/

    [addOns] => Array
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270

    [wordpress] => /var/www/html

Call for Papers - Electronic Design Process Symposium (Monterey, CA)

Daniel Payne

19[SUP]th[/SUP] Annual
Electronic Design Process Symposium
April 5 & 6, 2012
Monterey Beach Hotel, Monterey, CA

Sponsored by:
IEEE Computer Society of Silicon Valley (CS-SCV)
Design Automation Technical Committee (DATC)
Council on Electronic Design Automation (CEDA)

The Electronic Design Processes Symposium (EDPS) provides a forum for a cross-section of the top thinkers, movers and shakers who focus on how chips and systems are designed to discuss state-of-the-art electronic design processes and CAD methodologies. The workshop focuses on the improvement of the overall design process, rather than on the functions of the individual tools themselves.

Session Themes suggested:
  • Parallel EDA
  • High-Level Design - including Requirements-Driven Design Flows
  • Cloud Computing - including Software as a Service
  • Low-Power Design - with Solution Mapping to 2009 ITRS Roadmap
  • 3D IC’s
Authors should submit full-length, original and unpublished papers along with author contact information. Proposals for special, poster, and panel sessions may also be submitted; a 1-page description along with organizer contact information is required. Send papers and proposals to:
[TABLE="class: t1, width: 337"]
[TD="class: td1, colspan: 2"]Keynote Speakers
[TD="class: td2"]Jim Hogan
[TD="class: td3"]Managing Partner, Vista Ventures
[TD="class: td4"]Misha Burich
[TD="class: td5"]Senior VP, Altera R&D

Important Dates:
Feb. 29 Submission Deadline
Mar. 16 Acceptance Notification
Mar. 30 Camera Ready Copy
Apr. 5, 6 On-site Registration

[url][/URL]– watch for updates