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ASML: EUV slow/steady progress to 5NM & 2020

Robert Maire

Moderator
ASML Reports/Guides In Line- Q2 orders offset Q1
EUV slow/steady progress to 5NM & 2020
HMI provides bonus to ASML- Negative for KLAM
Improving outlook for H2 as expected by overall industry...

ASML reported revenue of $1,914B and EPS of $0.91 which was more or less in line with expectations, a few pennies above on EPS and slightly below on revs. GM was 42%. Outlook was for a roughly flat Q3 but with improved GM. Orders were up significantly at 1,566B Euros which included 4 EUV systems. Order patterns continue to be lumpy as can be expected with the large ASP tools and fab construction plans.

Improving outlook for H2 as expected by overall industry...
As we have recently heard at Semicon and been expecting for a while, the second half of 2016 will see a continued 3D NAND ramp and 10NM foundry and logic ramp spending. ASML also mentioned X-Point production starting this year (which we have not heard much about from others in the industry). DRAM at the 2X node with some initial production starting at 1X.

10NM will drive quickly to 7NM...

From all companies we have spoken to in the industry, the 10NM node will be a "Lite" node, with a short lifespan, before the industry pushes harder to 7NM which will likely be a stronger, longer lived node.

Right now EUV is shut out of 10NM (despite ASML previously predicting it would get some layers at 10NM). Given that 7NM is a 10NM "on steroids" node the equipment reuse will likely be high as the process changes will be minimal. We think that this also applies to litho and ASML is being overly optimistic about EUV usage at 7NM as the technology is still not up to speed or reliability and 7NM decisions are being made now.

EUV remains a 2020 5NM story...

With 10NM process decided a while ago and 7NM not being much different it appears clear that EUV will likely be a 5NM production "insertion" point of significance. This is also confirmed from public statements from the likes of TSMC that say that 5NM will the the right node for EUV.

The delays of 10NM at Intel may put its 7NM later in the game as compared to other competitors which may make it more viable to do a layer or two on EUV at their 7NM node which may correspond to TSMC's 5NM timing if things continue to drag out.

The rate of progress on EUV also seems to intersect with 5NM rollout schedules that we have heard of.

All of this seems to confirm that the real starting point for "true production" of EUV is at 5NM in the 2020 timeframe.

Strong Hermes Upside...

With continue to view the Hermes acquisition as a great deal for ASML (though expensive...good things don't come cheap). It continues to push the "Holistic litho" game plan and builds a strong wall around the "patterning" process at fabs which includes all the needed technology to pattern a wafer.

It should help speed EUV by integrating much of the metrology in the feedback loop. As patterning gets incrementally more difficult the need for measurement increases dramatically.

The deal should close without a problem as we would expect that most chipmakers would welcome the added help in the litho cell. We see no other regulatory issue.

We are sure that ASML will be able to fully utilize all the benefits that will come with the acquisition in both the DUV and EUV markets and further distance themselves from whatever remains of their minimal competition.

EUV + Hermes = Double Negative for KLAM...

The lack and delay of EUV has been a boon for Lam as the need for multipatterning to substitute has driven dep and etch sales. The converse is also true, that as EUV is adopted , the value that shifted away from litho to dep and etch will flow back towards litho away from dep and etch.

With the acquisition of Hermes, Lam is now also impacted through its acquisition of KLA. It is clear that ASML will now strongly push its own overlay & metrology solutions and work to tightly integrate them at the expense of shutting out other players such as KLA. Though this will take some time, ASML is in the catbirds seat and can slowly grind down the competition by shutting off their oxygen supply of information around the process.

This will not happen overnight but will likely happen over the next 3 4 years as EUV becomes real and Hermes is integrated. KLAM needs to get its act together to find ways to get new growth to counteract the double negative of EUV & Hermes/ASML as the synergies of the deal may not offset these two negatives.

The stock.....

The in line report and guidance is confirmation of the ASML story that we already knew but takes away uncertainty and concerns and thus supports the stock valuation. Overall we still feel the stock is fully valued and would look elsewhere in the semi universe for something less fully valued.

ASML also said it was stopping buybacks to pay for the Hermes acquisition and this may also take away some support for the stock over the next few quarters. For European investors who have fewer alternatives, this remains a core technology holding.

We are a bit concerned that we could see a flattening of demand after the initial 10NM ramp up as reuse for 7NM will be high and DRAM is still slow but this issue will not manifest itself until early 2017 and we get a clearer view.

Right now we don't see a lot of downside in the stock but likewise we don't see compelling upside given the recent move.

 

Scotten Jones

Moderator
The implementation dates/nodes I have heard are:

TSMC has said they plan to insert EUV at 5nm late 2019 - TSMC 2016-Q2 conference call.

At SEMICON West 2016 Kelvin Low of Samsung stated Samsung will insert EUV at 7nm and on a call this week he predicted that will be late 2018.

Global Foundries has said they will insert EUV as a second generation 7nm booster if it is available but their 7nm process is designed to not need EUV. Global Foundries hasn't said when 7nm will come out but they say they will be competitive which I take to mean by early 2018 - interview with Gary Patton, Global Foundries CTO at SEMICON West.

If Intel sticks to a 3 year cycle 7nm could be 2020 so possibly they would insert it then.

Based on these statement it appears Samsung is trying to be the first logic implementer late 2018. TSMC looks like 2019, Global Foundries could add it in 2018/2019 time frame and Intel is likely not until 2020.

I estimate Samsung will need approximately 17 EUV systems for a 40,000 wpm fab running their 7nm process. ASML has said their EUV production capacity will be 12 units in 2017 and 24 units in 2018. ASML's production capacity could become limiting on the implementation of EUV.
 

Daniel Nenni

Admin
Staff member
It all depends on the progress of EUV I guess. Here is the EUV presentation from SEMICON. You tell me how inspiring this is:
 

jimarete

New member
"I estimate Samsung will need approximately 17 EUV systems for a 40,000 wpm fab running their 7nm process. ASML has said their EUV production capacity will be 12 units in 2017 and 24 units in 2018. ASML's production capacity could become limiting on the implementation of EUV."

Scotten (and Robert) - thanks for the on-going thoughts on EUV progress. Just interested in how you get to 17 tools? Even using 9 layers (top-end of ASML's estimate) of EUV at 7nm, with a 1500wpd tool this looks more like 8 tools (9*40k/45k)?

Thanks.
 

Scotten Jones

Moderator
"I estimate Samsung will need approximately 17 EUV systems for a 40,000 wpm fab running their 7nm process. ASML has said their EUV production capacity will be 12 units in 2017 and 24 units in 2018. ASML's production capacity could become limiting on the implementation of EUV."

Scotten (and Robert) - thanks for the on-going thoughts on EUV progress. Just interested in how you get to 17 tools? Even using 9 layers (top-end of ASML's estimate) of EUV at 7nm, with a 1500wpd tool this looks more like 8 tools (9*40k/45k)?

Thanks.
I used 100 wph and then take into account efficiency losses that occur in a real fab.

I also used EUV on every layer that can't be done with a single immersion exposure, single EUV for some or EUV cut/block for others so I have more than 9 EUV exposures.
 
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