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Apple joins UALink Consortium for open-standard AI accelerator interconnections

Industry consortiums are always such a mess. Remember, CXL was conceived and introduced by Intel as an open accelerator link with coherent memory semantics, and then, poof! Intel formed the CXL consortium and the membership transformed it into a memory pooling technology that has not made an impact on the market. And now there's UAL. I'm not hopeful.

The only two really successful computer industry specification consortiums I can think of are the PCISIG and NVM Express. Both have somehow survived the one-company-one-vote strategy that derails or overly-complicates their specifications.
 
Industry consortiums are always such a mess. Remember, CXL was conceived and introduced by Intel as an open accelerator link with coherent memory semantics, and then, poof! Intel formed the CXL consortium and the membership transformed it into a memory pooling technology that has not made an impact on the market. And now there's UAL. I'm not hopeful.

The only two really successful computer industry specification consortiums I can think of are the PCISIG and NVM Express. Both have somehow survived the one-company-one-vote strategy that derails or overly-complicates their specifications.
Also Khronos Group and USB Consortium (- the naming Scheme) JEDEC as well
 
Industry consortiums are always such a mess. Remember, CXL was conceived and introduced by Intel as an open accelerator link with coherent memory semantics, and then, poof! Intel formed the CXL consortium and the membership transformed it into a memory pooling technology that has not made an impact on the market. And now there's UAL. I'm not hopeful.

The only two really successful computer industry specification consortiums I can think of are the PCISIG and NVM Express. Both have somehow survived the one-company-one-vote strategy that derails or overly-complicates their specifications.
Not only that, but it’s really unclear what UALink brings to the party that CXl.mem doesn’t already support. It’s several years behind CXL3 already. Looks to me like it’s AMD trying to get their already built fabric accepted as “standard” so they can get a jump on the market. It’s really too bad Gen-Z didn’t take off. It was a much better architecture than either of these two
 
Not only that, but it’s really unclear what UALink brings to the party that CXl.mem doesn’t already support. It’s several years behind CXL3 already. Looks to me like it’s AMD trying to get their already built fabric accepted as “standard” so they can get a jump on the market. It’s really too bad Gen-Z didn’t take off. It was a much better architecture than either of these two
For those who don't know, Gen-Z was a distributed memory and distributed storage fabric proposal with a load/store or block storage model from about 2017. Intel wasn't involved, which was apparently a fatal issue for adoption in 2017-18. For those unfamiliar yet curious:

 
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