You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
Seeing Apple using TSMC's latest node is no surprise....but Intel?! Yes, Nikkei Asia has apparently learned that Apple and Intel have emerged as the first adopters of TSMC's 3nm process node. I would've thought AMD would have been behind Apple...but it looks like Intel must have paid a pretty penny to ensure itself in the front of the line.
Yes, we talked about this a while back. TSMC jacked up CAPEX due to the Intel N3 comittment made by Bob Swan (former Intel CEO). It looks like outsourcing cost him his job. Bob was hedging his bets in case Intel did not get their manufacturing business in order. Pat Gelsinger came in with IDM 2.0 and seemed to move away from outsourcing and is now competing with TSMC as a foundry “frenemy”. Unfortunately for Pat there is no such thing as a frenemy in the foundry business.
The latest news on the Intel 10nm chip delay and 7nm EUV throughput issues suggests that Bob Swan was right.
I do know that AMD got the N3 PDK the same time as Apple and Intel so it is a three horse race that Apple will win for sure. And if Intel cant get their designs to yield internally how will they do the first time out with frenemy TSMC? Meanwhile N3 is AMD’s third TSMC generation. My bet would be on Apple for the win, AMD for place, and Intel for show, absolutely.
"Pat Gelsinger came in with IDM 2.0 and seemed to move away from outsourcing and is now competing with TSMC as a foundry “frenemy”. Unfortunately for Pat there is no such thing as a frenemy in the foundry business."
Totally agree with this. I don't believe in the IDM 2.0 strategy at all.
In the Innovators Dilemma, Christensen talks about how disruption has as much to do do with business models vs technology. The technology is just what usually enables the disruptive business model, and incumbents fail not because they are incapable of adopting the new technology, but because they fail in the much harder task of reorganizing themselves around the new business model. This is why sustaining innovations, which enforce rather than change the industry business model, are not considered disruptive.
In semiconductors, fabless is the disruptive business model. If Intel fails to reorganize themselves into a fabless company, I believe they will fail entirely.
Yes, we talked about this a while back. TSMC jacked up CAPEX due to the Intel N3 comittment made by Bob Swan (former Intel CEO). It looks like outsourcing cost him his job. Bob was hedging his bets in case Intel did not get their manufacturing business in order. Pat Gelsinger came in with IDM 2.0 and seemed to move away from outsourcing and is now competing with TSMC as a foundry “frenemy”. Unfortunately for Pat there is no such thing as a frenemy in the foundry business.
The latest news on the Intel 10nm chip delay and 7nm EUV throughput issues suggests that Bob Swan was right.
I do know that AMD got the N3 PDK the same time as Apple and Intel so it is a three horse race that Apple will win for sure. And if Intel cant get their designs to yield internally how will they do the first time out with frenemy TSMC? Meanwhile N3 is AMD’s third TSMC generation. My bet would be on Apple for the win, AMD for place, and Intel for show, absolutely.
Hi Daniel, Can't Pat just cancel TSMC deal? Is there a penalty to pay if a customer cancel a deal? how wafer agreement work if customer want to cancel it?
That it asked to be onboarded for N3 does answer that question. Plus TSMC could ask around how many customers have seen an Intel7 PDK .. if they are not distributing that by now, they are not in the game in that generation. Not at the leading edge where TSMC cares about its best profits and its long term customer lock.
That it asked to be onboarded for N3 does answer that question. Plus TSMC could ask around how many customers have seen an Intel7 PDK .. if they are not distributing that by now, they are not in the game in that generation. Not at the leading edge where TSMC cares about its best profits and its long term customer lock.
If Intel's 7nm comes close to TSMC's 3nm...that would be a great news for Intel, not good for TSMC and very bad for Samsung. Scotten did project Intel's 7nm to be competitive with TSMC's 3nm...so we'll see. Both Bob Swan & Pat gave me the impression that Intel was cutting corners ("simplified and streamlined the 7nm process") to order to deliver Intel's 7nm by 2023. Right now, the rumors are that TSMC's 3nm will be going into Intel chips for laptops and HPC...which would seem to indicate that TSMC's 3nm node is superior.
That said....Intel's recent Sapphire Rapids delay only gives the impression that they are falling further behind (true or not) TSMC. It'll be interesting to hear what both TSMC says on their earnings call on July 15 and Intel on July 22. Perhaps Intel will announce a renaming of their nodes to closely match TSMC's as what Scotten suggested.
Yes, we talked about this a while back. TSMC jacked up CAPEX due to the Intel N3 comittment made by Bob Swan (former Intel CEO). It looks like outsourcing cost him his job. Bob was hedging his bets in case Intel did not get their manufacturing business in order. Pat Gelsinger came in with IDM 2.0 and seemed to move away from outsourcing and is now competing with TSMC as a foundry “frenemy”. Unfortunately for Pat there is no such thing as a frenemy in the foundry business.
The latest news on the Intel 10nm chip delay and 7nm EUV throughput issues suggests that Bob Swan was right.
I do know that AMD got the N3 PDK the same time as Apple and Intel so it is a three horse race that Apple will win for sure. And if Intel cant get their designs to yield internally how will they do the first time out with frenemy TSMC? Meanwhile N3 is AMD’s third TSMC generation. My bet would be on Apple for the win, AMD for place, and Intel for show, absolutely.
I though the main Intel problem here was internal process yield. Why wouldn't switching to TSMC fix that ?
Yes, there is no doubt some hard IP to port from Intel process to TSMC (perhaps not schedule/risk free). And some changes to the design process to get used to.
But I'm assuming that the transition from an Intel internal process to TSMC would also necessitate a move to a more "mainstream SoC" design style.
So I'm not seeing why Intel would have more yield problems at TSMC than anyone else. Yes, they have a bit of learning curve catching up to do. But that should be doable.
Pat gelsinger wants to lead in architecture, process, production and have a foundry as well. At the same time qualified engineers are choosing not to work at Intel. It doesn't look good.
I suppose Intel can only apply its 7nm in chiplet combination with TSMC's 3nm.
It looks like its process will have negligible EUV volume (compared to TSMC or even Samsung). Possibly that reassured TSMC.
To have a viable foundry model like TSMC or Samsung, Intel needs to keep older processes alive, does it have enough capacity to do so? It seemed just having enough 14nm and 10nm and some 22nm was enough trouble. Are there still Intel fabs without FinFETs (or Trigates)?
Intel has had manufacturing problems since 14nm. Now that AMD is competitive customers will not wait for Intel chips nor will they pay big prices. The deal with TSMC fixes that and reduces Intel manufacturing pressures and CAPEX requirements.
Yes, Intel is moving to cell based versus custom design for the TSMC processes. Hopefully they will learn something and move Intel internal processes to cell based for better yield and predictability. Also so Intel can better make RISC-V or ARM based designs.
I'm sure Intel could buy their way out of the N3 wafer agreement but, again, it is a hedge bet and from what it looks like to (10nm delay) it's a good bet. Pat Gelsinger said what he did (IDM 2.0) to get his dream job otherwise Bob Swan would still be there. I just hope Pat's dreams come true.
I though the main Intel problem here was internal process yield. Why wouldn't switching to TSMC fix that ?
Yes, there is no doubt some hard IP to port from Intel process to TSMC (perhaps not schedule/risk free). And some changes to the design process to get used to.
But I'm assuming that the transition from an Intel internal process to TSMC would also necessitate a move to a more "mainstream SoC" design style.
So I'm not seeing why Intel would have more yield problems at TSMC than anyone else. Yes, they have a bit of learning curve catching up to do. But that should be doable.
I suppose Intel can only apply its 7nm in chiplet combination with TSMC's 3nm.
It looks like its process will have negligible EUV volume (compared to TSMC or even Samsung). Possibly that reassured TSMC.
To have a viable foundry model like TSMC or Samsung, Intel needs to keep older processes alive, does it have enough capacity to do so? It seemed just having enough 14nm and 10nm and some 22nm was enough trouble. Are there still Intel fabs without FinFETs (or Trigates)?
I have the same feeling. Why not making a bunch of AL/ML accelerator chiplets with TSMC and integrating them with Intel’s CPU made by its own old or new processes. The design of the accelerators can leverage standard EDA and a lot of existing IPs so that Intel doesn’t have to do everything from scratch like if designing a new Core CPU with TSMC. For many future applications, the overall system performance may be determined by the accelerators instead of CPU so doing the most demanding part with may the most advanced node makes sense to me. Plus, doing so may finally make intel’s heavy investment on chiplet advanced packaging worthwhile.
Daniel why do you think Intel got access to TSMCs 3nm in the First Place? I can hardly belive That TSMC will give Intel any high volume on leading edge. Now with IDM2.0 there would be no money in the world i would give Intel the PDK…
