[content] => 
    [params] => Array
            [0] => /forum/index.php?threads/andes-technology-unveils-the-andescore%E2%84%A2-d23-a-feature-rich-low-power-and-highly-secured-entry-level-risc-v-processor.17190/

    [addOns] => Array
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270

    [wordpress] => /var/www/html

Andes Technology Unveils the AndesCore™ D23, A Feature-Rich, Low-Power and Highly-Secured Entry-Level RISC-V Processor


Staff member
SAN JOSE, CA - December 7, 2022 - Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announces the details of the AndesCore™ D23, a new 3-stage 32-bit RISC-V CPU core, to target embedded processing and IoT applications that require low power and high efficiency in a small footprint. The D23 achieves the industrial leading performance of 4.13 Coremark/MHz among the similar level of cores, the worst-case operating frequency at 28nm of up to 800MHz, and the minimum usable configuration at 26K gates.


“The D23 is a new member of the Entry Series AndesCore™ with a small gate count and high performance-efficiency. In addition to RISC-V RV32GC extension including single/double precision FPU, it supports the recently ratified extensions such as bit manipulation (B) extension, scalar cryptography (K) extension, cache management operation (CMO) extension, code size reduction extension and the draft of packed SIMD/DSP extension. The packed SIMD extension together with Andes NN SDK, which includes TensorFlow Lite and Andes AI optimizer, help customers to provide AI acceleration in a small package. It also deploys Core-Local Interrupt Controller (CLIC) which can service more than 1000 interrupts for fast interrupt response, interrupt prioritization and pre-emption, and Andes V5 extensions that includes StackSafe™ for hardware stack protection, CoDense™ for code size compression on top of the C extension, and PowerBrake for power management,” stated President and CTO, Dr. Charlie Su. “Other advanced functions like instruction and data caches, memory soft error protection and Andes Custom Extension™ will be available too.”

Furthermore, the D23 packs many security features, such as enhanced and supervisor-mode Physical Memory Protection (ePMP/sPMP) to improve CPU core’s security level. The new scalar cryptography extension (K) provides instructions to accelerate AES encryption/decryption for network and data encryption and SHA256/512 instructions for digital signatures and certificates. The D23 also supports AndeSentry™, a security framework that enables open collaboration with our security partners to provide security solutions such as secure boot/debug and TEE. The D23 is perfect match for the new Matter IoT standard because its strong security features. The D23 gives designers the ability and flexibility to meet the demands for DSP processing, security, power, area and performance. Therefore, it can be used in many applications such as smart home appliances, wearables, AIoT devices and special purpose MCUs.

The D23 with most features will be available for early customer evaluation at Q1 2023, and its full features for general customer evaluation at Q3. Please contact Andes Sales for the details at

About Andes Technology

Seventeen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Link to Press Release