- Come and see our demo of these IPs on N5 test-chips - 20GHz C2C PLL with very low DJ, 8GHz Low Power PLL for digital SoC application, PVT Sensor, Power Supply Droop Detector, Xtal OSC and Differential Clock Buffers proven on TSMC N5 process
- Paper 1: “Sensing the Unknown: Modern Methods to Designing Chips”
- Paper 2: Joint paper with Siemens “Design and Verification of Clocking Macros and Sensors in N5 and N3 Processes Targeting High Performance Compute, Automotive, and IoT Applications.”
“The Analog Foundation IP is a key differentiator for every high-end SoC that is optimizing for performance, power or density,” said Mahesh Tirupattur, Executive Vice President at Analog Bits. “Our early and close collaboration with TSMC on advanced nodes allows us to de-risk our mutual customers and deliver the highest reliability & quality of IP’s. We truly appreciate our years of symbiotic partnership with TSMC.”
To learn more about Analog Bits’ foundation analog IP, visit www.analogbits.com or email us at: email@example.com.
About Analog Bits
Founded in 1995, Analog Bits, Inc. (www.analogbits.com) is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SoCs.
Our products include precision clocking macros, Sensors, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s. With billions of IP cores fabricated in customer silicon, from 0.35- micron to 3nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.