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AMIQ EDA Releases Version 18.1 of the Design and Verification Tools Eclipse IDE

Daniel Nenni

Admin
Staff member
Feb 26, 2018, San Jose, California — AMIQ EDA, a pioneer in integrated development environments (IDEs) for hardware design and verification and a provider of platform-independent software tools for efficient code development and analysis, today announced new capabilities in the DVT Eclipse IDE 18.1 major release.

The DVT Eclipse IDE is a complete and powerful source code integrated development environment for the design and verification languages e, SystemVerilog, Verilog, Verilog-AMS, VHDL, SLN, UPF, and CPF. It is built on the Eclipse Platform and includes IEEE standard-compliant parsers, which continuously run in the background. The tool integrates within a single window a smart code editor with a comprehensive set of features that help with code inspection, navigation, documentation, and debugging.

The key enhancements and new capabilities the DVT Eclipse IDE version 18.1 brings to its users include:

Support for SLN Language

The DVT Eclipse IDE supports the System-Level Notation (SLN) portable stimulus syntax developed by Cadence® Design Systems, Inc. for its Perspec™ System Verifier system-on-chip (SoC) verification solution. Engineers writing SLN now have the same benefits as users of other languages that DVT Eclipse IDE already supports: instant access to compilation and error detection with quick-fix proposals, hyperlinks to jump to declarations and usages, context-sensitive auto-completion of SLN constructs, structural views for browsing type and component hierarchies, project database queries, diagrams, rename refactoring and source code formatting.

Support for Low Power Design and Verification - IEEE Std. 1801, UPF, CPF

The DVT Eclipse IDE supports power-intent specification languages. It compiles IEEE Std. 1801, UPF and CPF files and elaborates power domains. To speed-up development and simplify debugging, power domains specific information is presented in design hierarchies, diagrams, breadcrumb navigation bars, tooltips and inspect views. Any changes in the design or the IEEE Std. 1801, UPF or CPF files are incrementally analyzed, errors are flagged on the fly, and the power domains model is automatically updated and presented in the DVT Eclipse IDE GUI.

Breadcrumb Navigation Capabilities

The new Breadcrumb Navigation Bar speeds-up design browsing. It appears horizontally on top of source code editors and design diagrams and it allows engineers to quickly move up and down in the design hierarchy.

Automated FPGA Projects Bring-up

Existing Xilinx Vivado/ISE or Intel (Altera) Quartus FPGA projects are automatically recognized and engineers can enjoy the DVT Eclipse IDE capabilities right away.

Enhanced Compilation

The e Language and VHDL compilers perform full type checking. Engineers save even more time when writing code as more errors are detected upfront before invoking a simulator. For SystemVerilog this functionality is already available in previous releases. The e Language compiler handles "define as computed" macros out of the box, additional compilation directives to help handling such macros are no longer required.

UVM Components Diagrams and Enhanced Diagram Refinements

UVM Components Diagrams enable verification engineers quickly get an overview of their testbench. On the design side, the advanced filtering capabilities in schematics allow engineers to quickly visualize clock and reset signals or focus on a set of instances and their connections.

Enhanced Source Code Highlighting

To further simplify reading source code, highlighting takes into consideration the language semantics. For example engineers can easily distinguish between input and output ports, local and member variables, parameters and signals.

AMIQ EDA is exhibiting at DVCon US 2018, Booth #405, Feb 26 - 28, in San Jose CA and showcasing its products: DVT Eclipse IDE, DVT Debugger, Verissimo SystemVerilog Testbench Linter, and Specador Documentation Generator.

About AMIQ EDA

AMIQ EDA provides design and verification engineers with platform-independent software tools that enable them to increase the speed and quality of new code development, simplify debugging and legacy code maintenance, accelerate language and methodology learning, improve testbench reliability, extract automatically accurate documentation, and implement best coding practices. Its solutions, DVT Eclipse IDE, DVT Debugger, Verissimo SystemVerilog Testbench Linter, and Specador Documentation Generator have been adopted worldwide. AMIQ strives to deliver high quality solutions and customer service responsiveness. For more information about AMIQ EDA and its solutions, visit www.amiq.com and www.dvteclipse.com.

Press Contact

Cristian Amitroaie

+40-721-284-254

cristian@amiq.com
 
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