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Alphawave IP Achieves Its First Testchip Tapeout for TSMC N3E Process

Daniel Nenni

Staff member
Alphawave IP, a global leader in high-speed connectivity for the world’s technology infrastructure announced the successful tapeout of its ZeusCORE100® 1-112Gbps NRZ/PAM4 Serialiser-Deserialiser (“SerDes”), the first testchip on TSMC’s most advanced 3nm process node.We will be exhibiting our portfolio of high-performance IP, chiplet, and custom silicon solutions at the TSMC OIP Forum on October 26 in Santa Clara, CA as the Platinum sponsor.

ZeusCORE100® is Alphawave’s most advanced multi-standard-SerDes, supporting extra-long channels over 45dB and the most requested standards such as 800G Ethernet, OIF 112G-CEI, PCIe GEN6, and CXL3.0. Come meet the company’s technology experts including members of the recently acquired OpenFive team. OpenFive is a longstanding partner of TSMC through the OIP Value Chain Aggregator (VCA) program. OpenFive is one of a select few companies with an idea-to-silicon methodology in TSMC’s latest technologies, and advanced 2.5D packaging capabilities, enabling access to the most advanced foundry solution available with the best Power-Performance-Area (PPA). With Alphawave’s industry-leading IP portfolio and the addition of OpenFive’s capabilities, designers can create systems-on-chip (SoCs) that pack more compute power into smaller form factors for networking, AI, storage, and high-performance computing (HPC) applications.

Learn more about ZeusCORE100®

Booth # 804
Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, CA 95113

October 26, 2022
8:30 AM - 6:00 PM

Clint Walker
VP of Marketing, Alphawave IP

Alphawave IP’s VP of Marketing, Clint Walker, will showcase customer success examples from Achronix Semiconductor Corporation in the “Integration Methodology of High-End SerDes IP into FPGAs based on Early Technology Model Availability” presentation at the event. Learn more about a successful product from one of Alphawave IP’s first customers for 112Gbps PAM4 SerDes.