How "fungible" are memory maker fabs for switching between memory types?

[Xebec]

How easy is it for Samsung, SK Hynix, Micron, etc. to switch production between memory types -- examples: DDR5 to GDDR7, or DDR5 to HBM.

I suspect the DDR5 to GDDR7 example is pretty quick - with downtime measured in hours or low days, and is similar to say TSMC changing production between different logic chips.

I imagine that DDR to HBM is significantly harder because of HBM requiring stacking where DDR is not stacked today, though perhaps it's not too bad if the 3D stacking is ~heavily decoupled from the memory production lines.

I just want to learn a bit more about how quickly (or not) the various memory makers can pivot between ("popular") RAM technologies.

Thanks!

 

[MKWVentures]

How easy is it for Samsung, SK Hynix, Micron, etc. to switch production between memory types -- examples: DDR5 to GDDR7, or DDR5 to HBM.

I suspect the DDR5 to GDDR7 example is pretty quick - with downtime measured in hours or low days, and is similar to say TSMC changing production between different logic chips.

I imagine that DDR to HBM is significantly harder because of HBM requiring stacking where DDR is not stacked today, though perhaps it's not too bad if the 3D stacking is ~heavily decoupled from the memory production lines.

I just want to learn a bit more about how quickly (or not) the various memory makers can pivot between ("popular") RAM technologies.

Thanks!

Other than HBM they are similar. but the Chip designs are different so its a wafer start issue (Assume cycle time from start to package chip ship of 5 months).

HBM is a modified process of a given node. then there is the real issue of backend assembly and packaging (no flex with DDR)

Another issues is that some companies are runing HBM and DDR in different fabs due to different nodes. Use to be that RDRAM (Datacenter) was also on older process.

So mostly its wafer start 5 months. for HBM it could be longer and/or not possible due to non-fab constraints

the issue is careful planning but really Theory of Constraints on what the real limiters are. When I looked at this over a year ago, the limiter was not the fab in any HBM product at any of the three. One company's constraint was material and tools for TC-NCF... Probably .1% of the total cost of production.

Not sure what current limiters are for HBM

Side note on the datacenter market. In past analysis, AI servers have 5x+ more DDR bits than HBM bits. I think this will even be true on HBM4 systems

 

[Xebec]

the issue is careful planning but really Theory of Constraints on what the real limiters are. When I looked at this over a year ago, the limiter was not the fab in any HBM product at any of the three. One company's constraint was material and tools for TC-NCF... Probably .1% of the total cost of production.

Not sure what current limiters are for HBM

Side note on the datacenter market. In past analysis, AI servers have 5x+ more DDR bits than HBM bits. I think this will even be true on HBM4 systems

Great response -- and very interesting re: materials. That sounds like a supply chain weakspot, at least when you did the analysis.

re: DDR vs HBM; is it AI DC's prefer HBM for training, but DDR is better (cost effective) for inference?