Not Just Numbers: How TSMC’s “Small-Step, Fast-Run” Strategy Became Its Secret Weapon Against Samsung and Intel

[karin623]

Everyone knows TSMC as the world’s most advanced chipmaker. But few realize that one of its biggest advantages isn’t measured in nanometers — it’s in how those nanometers evolve.

In a rare semi-official interview with Y.J. Mii, TSMC’s newly appointed Executive Vice President and Co-Chief Operating Officer, we finally get a glimpse into the company’s long-kept secret: the half-node.

Born in the 1990s, this deceptively simple idea — making small, incremental shrinks instead of big leaps — became the cornerstone of TSMC’s “small-step, fast-run” strategy. It’s how the company turned caution into precision, iteration into dominance, and consistency into innovation.

From the legendary 28 nm era that Morris Chang called his proudest victory, to the current 4 nm and 5 nm processes powering AI data centers, the same philosophy endures. The half-node isn’t just a tweak in chip design — it’s the rhythm that keeps TSMC perpetually ahead of Samsung and Intel.

Read the full story: Inside TSMC’s Secret Weapon: The Power of the Half-Node.

Not Just Numbers: How TSMC’s “Small-Step, Fast-Run” Strategy Became Its Secret Weapon Against Samsung and Intel

Liang-rong Chen

cwnewsroom.substack.com

 

[hist78]

Everyone knows TSMC as the world’s most advanced chipmaker. But few realize that one of its biggest advantages isn’t measured in nanometers — it’s in how those nanometers evolve.

In a rare semi-official interview with Y.J. Mii, TSMC’s newly appointed Executive Vice President and Co-Chief Operating Officer, we finally get a glimpse into the company’s long-kept secret: the half-node.

Born in the 1990s, this deceptively simple idea — making small, incremental shrinks instead of big leaps — became the cornerstone of TSMC’s “small-step, fast-run” strategy. It’s how the company turned caution into precision, iteration into dominance, and consistency into innovation.

From the legendary 28 nm era that Morris Chang called his proudest victory, to the current 4 nm and 5 nm processes powering AI data centers, the same philosophy endures. The half-node isn’t just a tweak in chip design — it’s the rhythm that keeps TSMC perpetually ahead of Samsung and Intel.

Read the full story: Inside TSMC’s Secret Weapon: The Power of the Half-Node.

Not Just Numbers: How TSMC’s “Small-Step, Fast-Run” Strategy Became Its Secret Weapon Against Samsung and Intel

Liang-rong Chen

cwnewsroom.substack.com

The half-node and small-step approach improves on time product delivery. Predictability in product delivery is extremely important to TSMC and its customers, such as Apple, Qualcomm, MediaTek, Nvidia, AMD, and the broader supply chain and ecosystem.

Apple relies on predictability to plan its finances for manufacturing, marketing, and business expansion. Foxconn needs it to hire and train employees and to prepare the necessary, often expensive, production tools. AMD depends on it to inform its customers when they can roll out new data center servers to replace Intel based systems.

 

[benb]

TSMC guessed right on 28nm (gate last, HKMG) and iterated steadily from there. They also got Apple from 20nm onward. Pulling Apple away from Samsung destroyed Samsung (in hindsight).

Apple puts the wind in TSMC sails.

 

[Daniel Nenni]

TSMC guessed right on 28nm (gate last, HKMG) and iterated steadily from there. They also got Apple from 20nm onward. Pulling Apple away from Samsung destroyed Samsung (in hindsight).

Apple puts the wind in TSMC sails.

We have been doing half node for many years. High volume fabless companies demanded it. Now we call it a family of processes but they really are half nodes.

I remember doing an optical shrink between 65nm and 40nm with ATI GPUs. It was an optical shrink with some extra yield enhancements IIRC.

 

[Xebec]

We have been doing half node for many years. High volume fabless companies demanded it. Now we call it a family of processes but they really are half nodes.

I remember doing an optical shrink between 65nm and 40nm with ATI GPUs. It was an optical shrink with some extra yield enhancements IIRC.

I was going to ask how long this has been prevelant. I remember following the "standard" node naming conventions of Intel, and AMD.. then ITRC.

Then I started watching GPUs. When Intel was going from 65nm to 45nm, TSMC also had a 55nm step in there (65 --> 55 --> 40). I also vaguely remember TSMC also having a 150nm, straddling Intel's 180nm and 130nm nodes. (.18, .13 micron ).

Were these early half nodes customer requests? or just smart business based upon the equipment and cost at the time?

 

[tomatoma]

Half nodes were established due to various cost-related reasons.
This is not just a TSMC issue.

 

[tomatoma]

The half-node and small-step approach improves on time product delivery. Predictability in product delivery is extremely important to TSMC and its customers, such as Apple, Qualcomm, MediaTek, Nvidia, AMD, and the broader supply chain and ecosystem.

Apple relies on predictability to plan its finances for manufacturing, marketing, and business expansion. Foxconn needs it to hire and train employees and to prepare the necessary, often expensive, production tools. AMD depends on it to inform its customers when they can roll out new data center servers to replace Intel based systems.

I don't really understand