I don't think there is anything wrong with that margin calculation.
I believe Intel Product group margin is being calculated with market wafer pricing for similar node process in market used for making those products. This is like Intel Product team buying wafers from TSMC prices from Intel foundry. (I think that is what they are supposed to be doing ideally but in reality, there may be some bias or massaging numbers stuff going on).
This way, Intel foundry being not a sound business financially (high cost, inefficiency, low utilization, idle fabs, huge depreciation cost etc) is not Intel products team's concern and it gives an opportunity for Intel management to identify inefficiencies and fix that.
Now I fully acknowledge that Intel Foundry was & is a strong moat for Intel that made them king of compute for the last couple of decades. But that does not mean they were run efficiently or profitably (in an IDM structure, it was not even a concern). Even in 2021, when Intel was making record revenue of $79b and profits, Intel foundry was making an operating loss of $5b!. Their operating margin at that time was 25% for the entire business, so Intel products must have had much higher margin to offset this foundry loss.
https://www.intc.com/filings-report...0000050863-24-000068/0000050863-24-000068.pdf
So I don't believe Intel Foundry division was ever profitable on their own and being an IDM, nobody at Intel cared. Pat and Dave spoke about it many times about too many steppings, hot lots etc.
The real problem I have with Intel margin calculation there is another operating expense bucket called "Unallocated Corporate Expenses" that include Stock Based Compensation but is not included in segment operating profit calculation. I believe that is supposed to be included in COGS, R&D and SGA depending on whoever gets these stocks. So, I do think Intel product margin is overstated a little due to this. I am not a finance person to truly know if what they are doing this way is acceptable per GAAP but these results were audited and approved.
I think(imho) Lion Cove is actually not that bad. There is definitely a latency issue due to the tiles approach vs monolithic but Robert Hallock (Intel) said in recent interview its firmware/microcode issues that is overblowing this issue. Also recent patches/updates by game developers had improved gaming performance of ARL-S, for example Cyberpunk 2077 had a huge uplift that puts the 285K in line or slightly above 14900k while consume less power. So with time, some of these issues will be ironed out. I don't expect it to beat 9940x or 14900K across the benchmarks anytime.
Also with regard to process nodes, Zen 5 is on N4P (if I am not mistaken), so N3 (which N3B now) is 3 to 8% better in power and 0-4% better in performance per following graphic. And I am pretty sure, N3 is very costly too.
Considering this is one of the first time, Intel engineers are working with an external foundry to make their products and first tiles approach on desktop sort of Zen 2 for AMD (based on what I see, Zen 2 was not received well for gaming too), I think we can cut them some slack this one time.
View attachment 2605
github.com
for big clouds like Amazon/Google/Microsoft they almost have all their stuff Inhouse so licencing goes down the drain as well but you can say they can park 33% more VMs on Turin Dense