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Has anyone any further information on this process beyond what is in the article. It sounds like a layering process similar to FDSOI but using EUV to give it the required features. There is no time frame for actual production either. I know TSM currently is working on 7nm and has plans for 3nm in the future. Any information on the current race in shrink would be appreciated and who is actually leading. Also will the coming technologies be competing or complimentary, each having specific strengths and weaknesses. Will InFO packaging be applicable to these smaller nodes? Any answers or even educated guesses are welcome, since this is what forums are best at.
Has anyone any further information on this process beyond what is in the article. It sounds like a layering process similar to FDSOI but using EUV to give it the required features. There is no time frame for actual production either. I know TSM currently is working on 7nm and has plans for 3nm in the future. Any information on the current race in shrink would be appreciated and who is actually leading. Also will the coming technologies be competing or complimentary, each having specific strengths and weaknesses. Will InFO packaging be applicable to these smaller nodes? Any answers or even educated guesses are welcome, since this is what forums are best at.
It looks like horizontal nanowires instead of FinFET. It looks closest to Samsung 4LPP. IMEC's research suggests it will only be used for one node after FinFET. Then it might go vertical.
Scott and I were briefed on this last week. He will have a blog or two on it soon. We were also briefed on the Samsung FD-SOI stuff which was quite interesting. Here is another link:
Has anyone any further information on this process beyond what is in the article. It sounds like a layering process similar to FDSOI but using EUV to give it the required features. There is no time frame for actual production either. I know TSM currently is working on 7nm and has plans for 3nm in the future. Any information on the current race in shrink would be appreciated and who is actually leading. Also will the coming technologies be competing or complimentary, each having specific strengths and weaknesses. Will InFO packaging be applicable to these smaller nodes? Any answers or even educated guesses are welcome, since this is what forums are best at.
I was going to say the same thing. You should also notice that the IBM 7nm process and the GF 7nm process are not the same, not even close. IBM is known for making one of anything but getting that one into production is another story!
