Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Are FPGA booting challenges causing frustrating delays and leaving you uncertain about project timelines? Have …
Featured Speakers: Priyank Shukla, Director of Product Management, Synopsys Kent Lusted, Distinguished Architect, Synopsys Why You Should Attend: Understand Industry Readiness: Explore the challenges and opportunities in the race to 448G SerDes and assess if the industry is prepared for this leap in high-speed serial interfaces. Learn About Emerging Standards: Gain insights into the latest advancements in standards shaping …
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Designing DSP Applications with Versal AI Engines Workshop This workshop covers the AMD Versal AI Engine architecture and using the AI Engine DSP Library, system partitioning, rapid prototyping, and custom coding of AI Engine kernels. Developing AI Engine DSP designs using AMD Vitis Model Composer is also demonstrated. The emphasis of this course is on: Providing an …
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Embark on a journey through semiconductor design, manufacturing, and business in this illuminating course. Explore IC design techniques, transistor evolution, and market dynamics. Delve into substrate types and industry economics, discovering the fastest-growing markets and key players shaping the semiconductor landscape. Pricing Early Bird Special - $100 off until August 11th! Members: $845 $745 Non-Members: $945 $845 * For …
Gain a comprehensive understanding of the semiconductor industry and the integrated circuit (IC) manufacturing process. This course is designed for new personnel in the field or anyone seeking a well-rounded knowledge of the tools, materials, and terminology used in semiconductor manufacturing. Pricing Early Bird Special! $100 off until August 12th Members: $995 $895 Non-Members: $1,095 $995 * For group …
Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Join us to explore the functionality and configurability of the AMD Zynq UltraScale+ RFSoC. With the RFSoC, configuring data converters is crucial for advanced system development, but the complexity often overwhelms developers, hindering progress. In this session, you'll discover the …
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Accelerating Connectivity with the Versal Adaptive SOC Network on Chip Workshop This workshop introduces the AMD Versal network on chip (NoC) to users familiar with other SoC architectures. Besides providing an overview of the major components in the Versal device, the course illustrates how the NoC is used to efficiently move data within the device. …
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Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. When it comes to embedded software development, managing multiple tools, maintaining version control, and navigating complex workflows can feel overwhelming. The AMD Vitis™ Unified IDE simplifies the process by integrating Vitis IDE, Vitis Analyzer, and Vitis HLS into a single, …
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Achieving Timing Closure in FPGA Designs Workshop Do you find it challenging to close timing in your FPGA design? This workshop will guide you through leveraging AMD Vivado’s tools, optimizing your design, and applying best practices for static timing analysis to achieve reliable timing closure. Gain hands-on experience with timing closure techniques and learn strategies to improve …
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Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Unlock the potential of the AMD Kria SOM and discover Time-Sensitive Networking (TSN) benefits for …
From Theory to Practice: Applying Timing Constraints Workshop Do you struggle to identify which constraints are needed for a design or how to properly input them? This workshop will cover …
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Description Clock domain crossings (CDCs) are a critical aspect of FPGA and embedded system design, and handling them correctly is essential for reliable operation. In this one-hour webinar, we’ll break …
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Essential Debugging Techniques Workshop This workshop is for hardware engineers, system architects, and anyone who wants to learn best practices for debugging challenging issues encountered while developing FPGAs, SoCs, PCBs, …
