Webinar: Why Choose PCIe 5.0 for Power, Performance, and Bandwidth at the Edge?

Online

Featured Speakers: Gustavo Pimentel, Principal Product Marketing Manager, Synopsys As edge, mobile and automotive applications demand faster data processing, lower latency, and reduced power consumption, PCI Express® 5.0 has emerged as the optimal interconnect standard. Doubling the data rate of PCIe 4.0 while enabling lane reduction, PCIe 5.0 helps SoC designers achieve significant savings in …

Webinar: Enabling Tomorrow’s Workloads with 1.6Tbps Ethernet

Online

Ethernet speeds are accelerating fast and AI, Cloud, and HPC workloads are driving demand that doubles every year. With 800Gbps ports in production and 1.6Tbps Ethernet around the corner, the need for robust pre-silicon verification has never been greater. Join this webinar to see how the Veloce™ hardware-assisted verification platform extends support for 1.6Tbps Ethernet …

Webinar: 5 Expectations for the AI Market in 2026

Online

October 15, 2025 - 11:00 AM EST   October 16, 2025 – 10:00 AM JST/KST Discover the 5 Critical AI Market Trends Reshaping Semiconductors in 2026 From datacenter accelerators to 2nm process technology, learn what’s next for AI and the semiconductor industry. The acceleration of artificial intelligence (AI) adoption is fueling one of the most transformative …

Webinar: ML-Enhanced TCAD Calibration With 10x Reduction in Time to Results

Online

Date: Oct 15, 2025 | 5:00 PM PST Featured Speakers: Saurabh Suryavanshi, Product Manager, Synopsys Youngkwon Cho, Senior Staff Engineer, Synopsys Dipanjan Basu, Principal Engineer, Synopsys Calibration is an essential part of enabling TCAD products usages inside Semiconductor fab. Synopsys has been leading the development of ML-enhanced calibration that reduce the time to results by 10x while improve the …

Webinar: Rapid Design Space Exploration of AI functions on Lattice FPGAs using Catapult High-Level Synthesis

Online

The increasing demand for accelerated computing solutions calls for an agile hardware design methodology to be able to keep up with fast evolving landscape of algorithms. Traditional hardware design methodology has long development cycles involving defining architecture, doing microarchitecture development using RTL, and performing verification. An agile workflow requires being able to iterate through the …

Webinar: Accelerating RTL-to-GDS digital implementation with generative and agentic AI: powered by Aprisa AI & the Siemens EDA AI System

Online

As digital chip design complexity grows, engineering teams face increasing pressure to meet aggressive PPA targets on tight schedules. To overcome this challenge, the EDA industry requires a revolutionary shift towards AI. Siemens EDA is leading this transformation by implementing a comprehensive strategy that combines machine learning, reinforcement learning, generative, and agentic AI across the …

Webinar: Exploring AMD Kria SOM for ROS 2 Multi-Node Communications with TSN Acceleration

Online

Description BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar. Unlock the potential of the AMD Kria SOM and discover Time-Sensitive Networking (TSN) benefits for your applications. In this session, you’ll explore the TSN-ROS application and its role in enhancing communications within a TSN framework. Join our hands-on demonstration to …

Webinar: 5 Expectations for the Memory Market in 2026

Online

October 29, 2025 - 11:00 AM EST    October 30, 2025 – 10:00 AM JST/KST Discover the 5 Critical Memory Market Trends Reshaping Semiconductors in 2026 AI workloads, HBM4 adoption, and 3D NAND scaling—what’s next for the memory industry in 2026. The memory semiconductor industry is entering a critical inflection point. Explosive AI workloads are pushing …

Webinar: 5 Expectations for the Sensor Market in 2026

Online

November 5, 2025 - 11:00 AM EST    November 6, 2025 – 10:00 AM JST/KST Discover the 5 Critical Sensor Market Trends Reshaping Semiconductors in 2026 From 8K smartphones to AI at the edge—explore the next generation of image sensor innovation. The image sensor industry is shifting from traditional pixel scaling to functionality-driven differentiation, unlocking new …

From Theory to Practice: Applying Timing Constraints Workshop

Online

From Theory to Practice: Applying Timing Constraints Workshop Do you struggle to identify which constraints are needed for a design or how to properly input them? This workshop will cover how to use features in Vivado, clock domain crossing strategies, and how to get the most out of static timing analysis for Versal devices. This …

Webinar: 5 Expectations for the Connectivity Market in 2026

Online

Discover the 5 Critical Connectivity Market Trends Reshaping Semiconductors in 2026 5G, ambient computing, and RF innovation—what’s next for connectivity semiconductors. The connectivity semiconductor industry is evolving rapidly as 5G matures, geopolitical shifts influence supply chains, and ambient/always-on computing paradigms drive next-generation RF architectures. From smartphones to IoT, wearables, and satellite networks, the connectivity landscape …

Webinar: 5 Expectations for the Automotive Market in 2026

Online

November 20, 2025 - 11:00 AM EST    November 21, 2025 – 10:00 AM JST/KST Discover the 5 Critical Automotive Market Trends Reshaping Semiconductors in 2026 AI, vehicle architectures, and trade impacts—what’s next for automotive semiconductors. The automotive semiconductor industry is navigating a complex landscape of trade tensions, evolving architectures, and AI deployment. Supply chain uncertainties …

Webinar: Mastering Clock Domain Crossings (CDC) and Synchronization Techniques

Online

Description Clock domain crossings (CDCs) are a critical aspect of FPGA and embedded system design, and handling them correctly is essential for reliable operation. In this one-hour webinar, we’ll break down CDC fundamentals, explore best practices for managing single-bit and bus CDCs, and demonstrate how to leverage Xilinx Parameterized Macros (XPM) for seamless synchronization. Join …

Webinar: 5 Expectations for the Advanced Packaging Market in 2026

This course will be held Online

December 2, 2025 - 11:00 AM EST    December 3, 2025 – 10:00 AM JST/KST Discover the 5 Critical Advanced Packaging Market Trends Reshaping Semiconductors in 2026 AI, 3D stacking, and next-gen substrates—what’s next for advanced packaging. The advanced packaging industry is at the forefront of semiconductor innovation, driven by the explosive growth of AI and …

Webinar: 5 Expectations for the PC/Laptop/Tablet Market in 2026

Online

December 9, 2025 - 11:00 AM EST    December 10, 2025 – 10:00 AM JST/KST Discover the 5 Critical PC/Laptop/Tablet Market Trends Reshaping Semiconductors in 2026 AI, tariffs, and processor innovations—what’s next for client computing markets. The client computing market is entering a pivotal transition as post-COVID refresh cycles conclude. With a cooling tablet segment and …

Webinar: 5 Expectations for the Consumer Electronics Market in 2026

Online

December 16, 2025 - 11:00 AM EST    December 17, 2025 – 10:00 AM JST/KST Discover the 5 Critical Consumer Electronics Market Trends Reshaping Semiconductors in 2026 AI, tariffs, smart home, and display innovations—what’s next for consumer electronics. The consumer electronics market is poised for transformation in 2026, driven by technology innovation, geopolitical dynamics, and rising …

Essential Debugging Techniques Workshop

Online

Essential Debugging Techniques Workshop This workshop is for hardware engineers, system architects, and anyone who wants to learn best practices for debugging challenging issues encountered while developing FPGAs, SoCs, PCBs, and embedded systems using the Vivado Design Suite. The features and capabilities of the Vivado Integrated Logic Analyzer are covered in lectures and demonstrations, along with …