January 5, 2026 - 11:00 AM EST January 6, 2026 – 10:00 AM JST/KST Discover the 5 Critical Mobile Market Trends Reshaping Semiconductors in 2026 Mobile AI, shifting supply chains, …
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About this event Next-generation AI systems are pushing electrical, optical, and packaging technologies to their limits. Join Keysight experts as they share insights on validating 224G / 448G SerDes, preparing for emerging …
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As the quantum threat moves from theory to reality, attacks put all long-lifecycle designs at risk. In this early PQC era, simply implementing the new NIST algorithms isn't enough. Implementations will evolve, and new physical attacks like side-channel analysis present a major threat to the security of these complex new algorithms. The solution requires both …
Date: Jan 14, 2026 | 10:00 AM PST Featured Speakers: Srikanth Venkat Raman, Product Management Director, Synopsys Khader Abdel-Hafez, Scientist, Synopsys Theo Toulas, R&D Principal Engineer, Synopsys Bruce Xue, Staff Engineer, Synopsys As System-on-Chip (SoC) designs become increasingly complex, meeting test quality and cost goals requires advances in automatic test pattern generation (ATPG). Synopsys TestMAX™ ATPG is Synopsys’ state-of-the-art …
Discover the 5 Critical Manufacturing Market Trends Reshaping Semiconductors in 2026 AI-driven investments, sustainability, and advanced materials—what’s next for semiconductor manufacturing. The semiconductor manufacturing industry is undergoing a transformative period as AI-driven investments accelerate, sustainability pressures mount, and foundries navigate capacity expansion amid weak consumer demand. In this live TechInsights webinar, our manufacturing experts will …
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We are pleased to offer two webinar sessions for your convenience. Please choose the time that best fits your schedule: 10:00AM – 12:00PM CET (session #1 for EMEA/APAC) 10:00AM – 12:00PM PST (session #2 for NA) Featured Speakers: Kopal Kulshreshtha, Principal Product Specialist, Synopsys Rob Dohanyos, Principal Product Specialist, Synopsys Introducing ParagonX, a powerful tool for intelligent analysis, debugging, simulation, and visualization …
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Timing closure is one of the most challenging aspects of ASIC design. While traditionally seen as a backend process, its resolution begins at the architectural level and extends through the implementation stages. This webinar examines the key obstacles designers encounter and demonstrates how our timing closure solutions deliver comprehensive support throughout the entire design process. …
In this webinar, we will explore the growing threat that AI-fueled cyberattacks pose to chip designs and how to add expert-level security verification to your design flow to minimize those risks. We will expose some of the details of the existential risk for electronic systems with real examples. We will then describe technology that easily …
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