Speaker: Bo Chen, Application Engineer Architect 10:00am~11:00 am Virtuoso ADE MATLAB Integration and Co-Simulation with Spectre RF MATLAB Simulink 11:00am~11:15 am Q&A Description: Spectre and MATLAB/Simulink co-simulation provides the co-simulation …
DATE: Wednesday, September 10, 2025 TIME: 8:00am PDT | 11:00am EDT | 3:00pm GMT | 8:30pm IST In mission-critical sectors like aerospace, defense, and space systems, reliability is everything. Failures carry enormous …
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Date: Tuesday, September 16, 2025 Time: 10:00 BST / 11:00 CEST / 12:00 EEST / 14:30 IST In the high-stakes world of aerospace and defense (A&D), engineers face mounting challenges in designing large-scale RF/mixed-signal systems for applications such as satellite arrays, airborne radar, secure communications, and electronic warfare systems. These systems require robust electromagnetic (EM) verification tools …
This webinar explores strategies for optimizing SMT filter designs, addressing spurious responses, parasitic behaviors, and PCB layout challenges using Cadence’s Microwave Office and Modelithics simulation models to ensure accurate and reliable performance. Webinar Details Join our webinar to discover challenges and optimization strategies for designing reliable and efficient filters using SMT capacitors and inductors. A …
Speaker: Soo Chuan Tang, Principal Application Engineer 10:00am~11:00am Next-Generation Spectre FX FastSPICE Simulator and Spectre X Integration with GPU 11:00am~11:15am Q&A Description: Leveraging a FastSPICE engine built from the ground up, Cadence Spectre FX Simulator delivers performance and accuracy improvements for full-chip and subsystem-level designs. Spectre FX simulator provides extensive circuit checking capabilities, allowing multithreading …
Overview Join us for a series of expert-led webinars showcasing cutting-edge simulation and analysis tools—from RF/mmWave modeling to advanced thermal and electromagnetic solutions. While designed for a broad range of …
Speaker: Hong-Cheang Quek, AE Director 10:00am~11:00am iPegasus Verification System for Virtuoso Studio 11:00am~11:15am Q&A Description: Today's complex SoC designs significantly increase layout creation and verification time, especially at advanced nodes. …
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Speaker: Kee Tat Ong, Principal Application Engineer 10:00am~11:00am Quantus Insight: Intelligent Parasitic Debugging, Optimization, and Signoff Closure 11:00am~11:15am Q&A Description: With more designs migrating to advanced process nodes, chips are …
