Date: Thursday, September 4, 2025 Time: 10:00 BST / 11:00 CEST / 12:00 EEST / 14:30 IST In the aerospace and defense (A&D) industry, where mission-critical RF and mmWave systems must perform …
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DATE: Wednesday, September 10, 2025 TIME: 8:00am PDT | 11:00am EDT | 3:00pm GMT | 8:30pm IST In mission-critical sectors like aerospace, defense, and space systems, reliability is everything. Failures carry enormous risk, making rigorous design validation essential. This webinar explores how advanced PSpice simulation techniques using Monte Carlo and worst-case analysis can help engineers evaluate statistical …
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Join us for an in-person seminar to explore the future of custom design and migration with AI-powered Virtuoso Studio. Discover how the latest innovations from Cadence are transforming analog, custom, RFIC, and MMIC design. Learn how these advancements enable faster, smarter insight analysis and more precise workflows using agentic AI. We will discuss: Harnessing Agentic …
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Date: Tuesday, September 16, 2025 Time: 10:00 BST / 11:00 CEST / 12:00 EEST / 14:30 IST In the high-stakes world of aerospace and defense (A&D), engineers face mounting challenges in designing large-scale RF/mixed-signal systems for applications such as satellite arrays, airborne radar, secure communications, and electronic warfare systems. These systems require robust electromagnetic (EM) verification tools …
This webinar explores strategies for optimizing SMT filter designs, addressing spurious responses, parasitic behaviors, and PCB layout challenges using Cadence’s Microwave Office and Modelithics simulation models to ensure accurate and reliable performance. Webinar Details Join our webinar to discover challenges and optimization strategies for designing reliable and efficient filters using SMT capacitors and inductors. A …
Speaker: Soo Chuan Tang, Principal Application Engineer 10:00am~11:00am Next-Generation Spectre FX FastSPICE Simulator and Spectre X Integration with GPU 11:00am~11:15am Q&A Description: Leveraging a FastSPICE engine built from the ground …
Join industry leaders and Cadence cloud experts at this free must-attend Cloud event of the year to explore the latest cloud EDA innovations, share ideas, and grow your professional connections. All attendees will receive a giveaway and a chance to win raffle prizes. DATE: September 25, 2025 TIME: 10:00am - 1:45pm PDT LOCATION: Hyatt Regency Santa Clara, 5101 Great America …
Overview Join us for a series of expert-led webinars showcasing cutting-edge simulation and analysis tools—from RF/mmWave modeling to advanced thermal and electromagnetic solutions. While designed for a broad range of high-performance electronics applications, each session also highlights how these technologies can be adapted to meet the rigorous demands of aerospace and defense (A&D) systems. Topics …
What does the future hold for marine CFD simulation? Join us at the CadenceCONNECT: CFD Innovations for Marine Applications seminar to find out! Historic software uses methods for solving that simply do not have the scalability to meet the needs of marine evolution. Cadence CFD analysis gives you an automatic and efficient computation setup. Additionally, …
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Event Summary The year 2025 is both a turning point for integrated photonics as a key enabler for AI, physical and infrastructure interconnect, and the International Year of Quantum (IYQ). In our event, we are going to explore the enabling technologies shared by these two exciting fields. While these systems need to exist in a …
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CadenceCONNECT: Jasper User Group 2025 is October 29 and 30 in San Jose, CA. This interactive, in-depth technical conference connects designers, verification engineers, and engineering managers from around the world to share the latest design and verification practices based on Cadence’s Jasper formal verification technologies and methodologies. The Jasper User Group Conference is the premier …
Speaker: Hong-Cheang Quek, AE Director 10:00am~11:00am iPegasus Verification System for Virtuoso Studio 11:00am~11:15am Q&A Description: Today's complex SoC designs significantly increase layout creation and verification time, especially at advanced nodes. To meet overall demand for faster design cycle turnaround time, bridge a demand gap, and improve productivity between custom implementation and physical verification tools, Cadence …
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Speaker: Kee Tat Ong, Principal Application Engineer 10:00am~11:00am Quantus Insight: Intelligent Parasitic Debugging, Optimization, and Signoff Closure 11:00am~11:15am Q&A Description: With more designs migrating to advanced process nodes, chips are getting smaller, but design complexity is increasing in order to deliver better power, performance, or area. These optimizations are restricted by the time window to …
