All Day

Wafer-Level Packaging Symposium 2026

Hyatt Regency San Francisco Airport 1333 Bayshore Highway, Burlingame

Formatting Advanced Packaging for the Next Generation The evolution of Advanced Package Technology is experiencing substantial changes as system designs directly drive package performance requirements—an unprecedented development in the industry. Historically, architects constructed circuits within packaging constraints to prevent undesirable outcomes. Nevertheless, increasing transistor expenses and the demand for improved power efficiency necessitate advancing package …

Semitracks Course: Defect-Based Testing

Munich, Germany Munich

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today's application-specific ICs and microprocessors can contain upwards of 100 million transistors. Traditional testing relies on the stuck-at-fault (SAF) to model defect behavior. Unfortunately, the SAF model is a poor model for defects. Other models and strategies are required to catch …