Learning to Live with the Gaps Between Design and Verification

Learning to Live with the Gaps Between Design and Verification
by Tom Simon on 04-09-2020 at 6:00 am

Learning to live with the gaps between design and verification

Whenever I am asked to explain how chip design works by someone who is unfamiliar with the process, I struggle to explain the different steps in the flow. It also makes me aware of the discrete separations between each phase of activities. Of course, when you speak to a novice it is not even possible to get more than one layer down in the… Read More