As AI and HPC systems scale to thousands of CPUs, GPUs, and accelerators, interconnect performance increasingly determines end-to-end efficiency. Training and inference pipelines rely on low-latency coordination, high-bandwidth memory transfers, and rapid communication across heterogeneous devices. With model sizes… Read More
Tag: Transaction Layer Packet
Securing PCIe Transaction Layer Packet (TLP) Transfers Against Digital Attacks
Securing PCIe Transaction Layer Packet (TLP) Transfers Against Digital Attacks
by Kalar Rajendiran on 06-01-2023 at 10:00 am
Categories: EDA, IP, Siemens EDA
by Kalar Rajendiran on 06-01-2023 at 10:00 am
Categories: EDA, IP, Siemens EDA
In the fast moving world of data communications, the appetite for high speed data transfers is accompanied by a growing need for data confidentiality and integrity. The wildly popular PCIe interface standard for connectivity has not only been increasing data transfer rates but has also introduced an Integrity and Data Encryption… Read More
