CEO Interview with Ohad Agami of Hiveware

CEO Interview with Ohad Agami of Hiveware
by Daniel Nenni on 07-26-2026 at 2:00 pm

ohad3

Ohad Agami is the co-founder and CEO of Hiveware, a semiconductor verification company he started in Tel Aviv in 2023 with CTO Yaniv Pascal. He has a systems-focused engineering background with deep experience in semiconductor architectures and complex verification flows, built at the AI chip company Hailo and earlier in Israel’s… Read More


Moores Lab(AI): Agentic AI and the New Era of Semiconductor Design

Moores Lab(AI): Agentic AI and the New Era of Semiconductor Design
by Kalar Rajendiran on 10-08-2025 at 10:00 am

Silicon Engineering at the Speed of AI

For decades, chip design has been a delicate balance of creativity and drudgery. Architects craft detailed specifications, engineers read those documents line by line, and teams write and debug thousands of lines of Verilog and UVM code. Verification alone can consume up to 35 percent of a project’s cost and add many months to … Read More


What is Different About Synopsys’ Comprehensive, Scalable Solution for Fast Heterogeneous Integration

What is Different About Synopsys’ Comprehensive, Scalable Solution for Fast Heterogeneous Integration
by Mike Gianfagna on 02-03-2025 at 10:00 am

What is Different About Synopsys’ Comprehensive, Scalable Solution for Fast Heterogeneous Integration

Multi-die design has become the center of a lot of conversation lately. The ability to integrate multiple heterogeneous devices into a single package has changed the semiconductor landscape, permanently. This technology has opened a path for continued Moore’s Law scaling at the system level. What comes next will truly be exciting.… Read More


WEBINAR: Scalable, On-Demand (by the Minute) Verification to Reach Coverage Closure

WEBINAR: Scalable, On-Demand (by the Minute) Verification to Reach Coverage Closure
by Synopsys on 09-13-2022 at 10:00 am

Synopsys Verification Cloud Solutions

Verification has long been the most time-consuming and often resource-intensive part of chip development. Building out the infrastructure to tackle verification can be a costly endeavor, however. Emerging and even well-established semiconductor companies must weigh the Cost-of-Results (COR) against Time-to-Results

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Techniques and Tools for Accelerating Low Power Design Simulations

Techniques and Tools for Accelerating Low Power Design Simulations
by Kalar Rajendiran on 02-17-2021 at 10:00 am

Figure 1 for Synopsys Blog

I recently watched a webinar titled “How to accelerate power-aware simulation debug with Synopsys’ VC LP” that was presented by Ashwani Kumar Dwivedi senior applications engineer at Synopsys. Watching the webinar made me reminisce how design verification has evolved over the years. A long time ago, static verification started… Read More


What Dolpin Technology Uses for SPICE Circuit Simulation of IP

What Dolpin Technology Uses for SPICE Circuit Simulation of IP
by Daniel Payne on 01-06-2012 at 12:32 pm

Mo Tamjidi founded two Semiconductor IP companies Virage Logic and Dolphin Technology. After reading a press release about how Dolphin Technology is using FineSIM SPICE from Magma I decided to contact him and learn more about why they are now using that circuit simulator in the design of their memory, standard cells, and IO cells.… Read More