ARM’s Azeez Bhavnagarwala recently gave a talk hosted by Solido on the benefits of variation aware design in optimizing 6T bit cells. Azeez sees higher clock rates, increasing usage of SRAM per processor and the escalating number of processors, shown in the diagram below, as trends that push designers toward 6T. Six Transistor… Read More
Webinar: Using Statistical Methods to Assess PCB Solder Failure Modes
Learn about that statistical methods used to track PCB field failures and how these methods are used in corresponding failure simulations during this upcoming webinar.
SEPTEMBER 21, 2022
11 AM EDT / 4 PM BST / 8:30 PM IST
About This Webinar
Printed Circuit Boards (PCBs) are susceptible to several known solder failure modes