Tag: simulation

Webinar: Supercharge Simulation Predictions with an AI SaaS Platform

Webinar: Supercharge Simulation Predictions with an AI SaaS Platform
by Admin on 05-05-2025 at 9:18 pm

Join our webinar to learn how cybersecurity systems protect data, ease cloud computing concerns, and boost confidence in cloud-native solutions with insights from leading providers like AWS.

DATE/TIME:
June 19 , 2025
10AM EDT

Venue:
Virtual

Overview

Many essential tools in our professional and personal lives now utilize Software

… Read More
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Designing and Simulating Next Generation Data Centers and AI Factories

Designing and Simulating Next Generation Data Centers and AI Factories
by Kalar Rajendiran on 04-22-2025 at 10:00 am
Categories: AI, Cadence, EDA, IP

Digital Twin and the AI Factory Lifecycle

At NVIDIA’s recent GTC conference, a Cadence-NVIDIA joint session provided insights into how AI-powered innovation is reshaping the future of data center infrastructure. Led by Kourosh Nemati, Senior Data Center Cooling and Infrastructure Engineer from NVIDIA and Sherman Ikemoto, Sales Development Group Director from … Read More

The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2025

The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2025
by Admin on 03-04-2025 at 8:21 pm

The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of leading-edge research and development results in the area of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided… Read More

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Handling Objections in UVM Code

Handling Objections in UVM Code
by Daniel Payne on 11-18-2024 at 10:00 am
Categories: EDA, Siemens EDA

expanded view min

You begin writing some UVM code and there are parts of the code that aren’t done yet, so you begin to use uvm_objection, guarding that code. Rich Edelman, a product engineer at Siemens doing verification debug and analysis, wrote a paper on this topic, which I just read. This blog covers the topic of objections and provides some different… Read More

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Blending Finite Element Methods and ML

Blending Finite Element Methods and ML
by Bernard Murphy on 01-23-2024 at 6:00 am
Categories: AI

FEM mesh min

Finite element methods for analysis crop up in many domains in electronic system design: mechanical stress analysis in multi-die systems, thermal analysis as a counterpart to both cooling and stress analysis (eg warping) and electromagnetic compliance analysis. (Computational fluid dynamics – CFD – is a different beast which… Read More

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AI in Verification – A Cadence Perspective

AI in Verification – A Cadence Perspective
by Bernard Murphy on 04-04-2023 at 6:00 am
Categories: AI, Cadence, EDA

Opening slide min

AI is everywhere or so it seems, though often promoted with insufficient detail to understand methods. I now look for substance, not trade secrets but how exactly they using AI. Matt Graham (Product Engineering Group Director at Cadence) gave a good and substantive tutorial pitch at DVCon, with real examples of goal-centric optimization… Read More

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Machine Learning Applications in Simulation

Machine Learning Applications in Simulation
by Daniel Nenni on 10-27-2022 at 6:00 am
Categories: Cadence, EDA

Xcelium ML min

Machine learning (ML) is finding its way into many of the tools in silicon design flows, to shorten run times and improve the quality of results. Logic simulation seemed an obvious target for ML, though resisted apparent benefits for a while. I suspect this was because we all assumed the obvious application should be to use ML to refine… Read More

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Leveraging Simulation to Accelerate the Design of Plasma Reactors for Semiconductor Etching Processes

Leveraging Simulation to Accelerate the Design of Plasma Reactors for Semiconductor Etching Processes
by Kalar Rajendiran on 06-03-2022 at 6:00 am
Categories: Dassault Systemes, EDA, Events

Etching Processes

There is no shortage of reporting on the many technological advances happening within the semiconductor industry. But sometimes it feels like we hear less in the area of semiconductor manufacturing equipment than in the design and product arenas. That doesn’t mean that there is less happening there or what is happening there … Read More

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WEBINARS: Board-Level EM Simulation Reduces Late Respin Drama

WEBINARS: Board-Level EM Simulation Reduces Late Respin Drama
by Don Dingee on 02-01-2022 at 6:00 am
Categories: EDA, Events, Keysight EDA

Flat Z design and voltage ripple example in board-level EM simulation

Advanced board designs are fertile ground for misbehavior in time and frequency domains. Relying on intuition, then waiting until near-final product for power integrity (PI) or EMI testing almost guarantees board respins are coming. Lumped-parameter simulations of on-board power delivery networks (PDNs) struggle with … Read More