Moore’s Law and 28nm Yield

Moore’s Law and 28nm Yield
by Daniel Nenni on 01-24-2010 at 10:44 pm

This blog is a follow-up to my second most viewed page Moore’s Law and 40nm Yield, with a strong recommendation of how to design for yield at the advanced nodes (32/28/22nm) with Verify High-Sigma design technology.

Case in point: Circuit blocks such as complex standard cells or memory bit cells are repeated thousands or even millions… Read More