CadenceTECHTALK: Proactively Address Thermal Concerns in Advanced IC Packages

CadenceTECHTALK: Proactively Address Thermal Concerns in Advanced IC Packages
by Admin on 08-31-2023 at 2:42 pm

Date: Thursday, October 12, 2023

Time: 10:00am – 11:00am (PDT)

The heterogeneous integration of chips and chiplets in IC packages is all the rage as we face “More than Moore” performance challenges. While these innovative design practices successfully address performance goals, some design teams find that IC packages… Read More


Cadence TechTalk: Design Robust IC Packages Faster Using In-Design SI/PI Analysis

Cadence TechTalk: Design Robust IC Packages Faster Using In-Design SI/PI Analysis
by Admin on 04-17-2023 at 3:30 pm

IC package design teams and characterization teams have had a “throw-it-over-the-wall” relationship for decades, which often delays design releases by months. However, as signal integrity (SI) and power integrity (PI) challenges evolve with multi-die heterogeneous integration, the need to perform SI/PI analysis as part

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