In 1492 Christopher Columbus sailed from Spain towards west on Atlantic Ocean in search of Asia and Indies. Between his four voyages (1492 – 1502) he discovered many different islands and then what we call Americas. Although he had a compass with him, imagine searching a needle in a haystack. Even with localization of areas and then… Read More
There are three critical goals that designers of custom digital designs and memories look to achieve with high sigma verification:
(1) obtaining accurate results,
(2) achieving results with good run-time (efficiency), and
(3) gaining proper insight into how their circuit is behaving along with an understanding of failure … Read More
“Connect with India” was a very successful event this year at Semicon West. Bettina Weiss (Vice President of Business Development at SEMI) organized this event. Along with several dignitaries from Indian government and its upcoming semiconductor industry, there were several semiconductor industry professionals… Read More
Last week I heard about the Indian Cabinet approving the proposal for setting up of two Fabs in India. One led by IBM, Tower Jazzand JP Associates(an Indian business house), and the other led by HSMC(Hindustan Semiconductor Manufacturing Co.), ST Microelectronicsand Silterra. Indian Semiconductor community including IESA… Read More
For a small company, Solido has some very large customers and partners, TSMC being on of them. Why? Because of the high yield and memory performance demand on leading edge technologies, that’s why.
Much has been made of and will continue to be said on the march of Moore’s Law. While economics of scale and performance vs. power… Read More
In today’s era, high performance mobile devices are asserting their place in every gizmos we play with and guess what enables them work efficiently behind the scene – it’s large chunks of memory with low power and high speed, packed as dense as possible. Ever growing requirement of power, performance and area led us to process nodes… Read More
Whether you use a gate-first or gate-last High-k Metal Gate implementation, yield will be your #1 concern at 28nm, which makes variation analysis and verification a big challenge. One of the consulting projects I have been working on with the foundries and top fabless semiconductor companies is High-Sigma Monte Carlo (HSMC) … Read More
