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Custom Layout Productivity Gets a Boostby Tom Dillinger on 04-11-2016 at 7:00 amCategories: EDA, Synopsys
In the 1970’s, when Moore’s Law was still in its infancy, Bill Lattin from Intel published a landmark paper [1]. In it he identified the need for new design tools and methods to improve layout productivity, which he defined as the drawn and verified number of transistors per day per layout designer. He said existing … Read More
In recent years, a number of technologies as well as the constant desire for faster and more pervasive mobile communication systems have set in motion a well sustained growth trend for the “next big thing” such as the Internet of Things (IoT), wearables, automobile electronics, advances in medical devices etc. In all these areas… Read More
