Webinar: From Copper to COUPE: Scaling AI Interconnects with Co-Packaged Optics

Webinar: From Copper to COUPE: Scaling AI Interconnects with Co-Packaged Optics
by Admin on 09-02-2026 at 10:37 pm

Featured Speakers:

  • Igor Elkanovich, CTO, GUC
  • Sheng-Fan Yang, Director, GUC
  • Madhumita Sanyal, Sr. Director Product Management, Synopsys

Co-packaged optics (CPO) breaks through the data movement constraint by moving optical engines next to the XPU, reducing electrical reach from centimeters to millimeters and delivering

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Synopsys and TSMC Deepen AI Design Alliance: What It Means

Synopsys and TSMC Deepen AI Design Alliance: What It Means
by Kalar Rajendiran on 05-05-2026 at 10:00 am

Synopsys Powering the next generation of AI

A recent announcement from Synopsys signals a meaningful escalation in the race to build next-generation AI hardware. The expanded collaboration between Synopsys and TSMC brings together silicon-proven IP, AI-driven design tools, and cutting-edge manufacturing processes in a tightly integrated effort to accelerate high-performance… Read More


Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design

Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design
by Kalar Rajendiran on 10-02-2024 at 10:00 am

OIP 2024 Synopsys TSMC

Synopsys made significant announcements during the recent TSMC OIP Ecosystem Forum, showcasing a range of cutting-edge solutions designed to address the growing complexities in semiconductor design. With a strong emphasis on enabling next-generation chip architectures, Synopsys introduced both new technologies and … Read More