Verification Challenge
As chip design complexity continues to grow astronomically with hardware accelerators running riot with the traditional hardware comprising CPUs, GPUs, networking and video and vision hardware, concurrency, control and coherency will dominate the landscape of verification complexity for safe … Read More
Webinar: Efficient Bluespec RISC-V Processor Verification for Highest Coverage Closure: A Comprehensive Case Study
Synopsys Webinar | Thursday, September 21, 2023 | 10:00 a.m. Pacific
The ability to mix and match multiple ISA extensions and add user-defined ISA extensions makes RISC-V verification more challenging than conventional processor verification. This Synopsys webinar demonstrates the verification of standard RISC-V ISA extensions.
