Array
(
[content] =>
[params] => Array
(
[0] => /forum/whats-new/latest-activity?before_id=108119
)
[addOns] => Array
(
[DL6/MLTP] => 13
[Hampel/TimeZoneDebug] => 1000070
[SV/ChangePostDate] => 2010200
[SemiWiki/Newsletter] => 1000010
[SemiWiki/WPMenu] => 1000010
[SemiWiki/XPressExtend] => 1000010
[ThemeHouse/XLink] => 1000970
[ThemeHouse/XPress] => 1010570
[XF] => 2030970
[XFI] => 1060170
)
[wordpress] => /var/www/html
)
You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please,
join our community today !
JavaScript is disabled. For a better experience, please enable JavaScript in your browser before proceeding.
You are using an out of date browser. It may not display this or other websites correctly.
You should upgrade or use an
alternative browser .
This section is incorrect. AMD uses UALink within a rack for scale-up. Ultra Ethernet is a scale-up scale-out network used between...
Feb 25, 2026
I
Because HP cells go faster (and consume even more power) at a given voltage, HD are more power-efficient but won't go as fast. For most...
Feb 25, 2026
Just for the record here, if Meta would put the new NVIDIA Rubin Ultra (Kyber rack) systems (2H 2027) in a 1 GW facility it could look...
Feb 25, 2026
L
I see an interesting post on weibo. If PTL is focus on efficiency not extreme performance, why not just use HD cell or some HD cell mix...
Feb 25, 2026
I'm no expert on this so I asked Gemini and this is the answer in terms of AMD-compute, maybe this helps?
1. The Core Infrastructure...
Feb 25, 2026
I'm no expert on this so I asked Gemini and this is the answer in terms of AMD-compute, maybe this helps?
1. The Core Infrastructure...
Feb 25, 2026
F
Exactly, Fred. The 1,000W milestone is monumental for throughput, but I’m curious how the industry plans to manage the localized...
Feb 25, 2026
New versions enable twice the previous data rate and gains in efficiency and scalability for flash storage applications
MIPI UniPro...
Feb 25, 2026
Worth noting, this isn't actually "the press" reporting - this is AMD themselves.
Their PR dept is purposefully choosing a metric...
Feb 25, 2026
In my opinion, power affects every day people far more than wafer constraints or packaging constraints or architectural constraints, and...
Feb 25, 2026
S
I'd have thought it's pretty much impossible, because the BSPD and FSPD regions have very different metal/substrate topography and the...
Feb 25, 2026
B
There could be a Big Cycle, 80 years. It involves debt overload and collapse, followed by reindustrialization. Debt collapse hasn't...
Feb 25, 2026
@siliconimist That was my first thought too, that the share of non-litho tools in capex might be increasing. We know litho intensity...
Feb 25, 2026
Perhaps ASML is now also very recently changing its view:
https://finance.yahoo.com/news/asml-sees-ai-demand-long-102719121.html
Maybe...
Feb 25, 2026
S
IDM product flow, or large volume customer product flow -- either will do... ;-)
I do agree 100% with what you're saying though, big...
Feb 25, 2026
user nl reacted to blueone's post in the thread AMD and Meta Announce Expanded Strategic Partnership to Deploy 6 Gigawatts of AMD GPUs with
Like.
This section is incorrect. AMD uses UALink within a rack for scale-up. Ultra Ethernet is a scale-up scale-out network used between...
Xebec reacted to user nl's post in the thread AMD and Meta Announce Expanded Strategic Partnership to Deploy 6 Gigawatts of AMD GPUs with
Daniel Nenni posted the thread MIPI Alliance Releases UniPro v3.0 and M-PHY v6.0, Accelerating JEDEC UFS Performance for Edge AI in Mobile, PC and Automotive in General Press.New versions enable twice the previous data rate and gains in efficiency and scalability for flash storage applications MIPI UniPro...