Array
(
[content] =>
[params] => Array
(
[0] => /forum/whats-new/latest-activity?before_id=105097
)
[addOns] => Array
(
[DL6/MLTP] => 13
[Hampel/TimeZoneDebug] => 1000070
[SV/ChangePostDate] => 2010200
[SemiWiki/Newsletter] => 1000010
[SemiWiki/WPMenu] => 1000010
[SemiWiki/XPressExtend] => 1000010
[ThemeHouse/XLink] => 1000970
[ThemeHouse/XPress] => 1010570
[XF] => 2030871
[XFI] => 1060170
)
[wordpress] => /var/www/html
)
You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please,
join our community today !
JavaScript is disabled. For a better experience, please enable JavaScript in your browser before proceeding.
You are using an out of date browser. It may not display this or other websites correctly.
You should upgrade or use an
alternative browser .
V
Intel's current capital expenditure (CapEx) plan does not include investments in 14A capacity for third-party clients. Hence, even if...
Jan 14, 2026
B
This is the fundamental problem. Times change. people need to adapt. Intel did not (well they did in 2020 but Pat reversed the...
Jan 14, 2026
B
Intel is in the process lead today with 18A in HVM and 14A fast following. Unfortunately, for the foundry business it is not all about...
Jan 14, 2026
M
You are correct.
Some issues
1) at least as of 3 years ago, There were LTD process integration people at Intel who said the process was...
Jan 14, 2026
M
10nm failure was cobalt, that's why it was walked back in subsequent nodes.
Jan 14, 2026
C
From CNBC: (among other sources)
Broadcom said in a September call that it had signed a customer that had placed a $10 billion order...
Jan 14, 2026
D
From what we've seen the wafer cost increase with N2 is bigger than the die area saving compared to N3, so for the same function an N2...
Jan 14, 2026
S
The Neoverse cores are typically used in CPUs and ASICs where per core performance is not absolutely critical, and to minimize...
Jan 14, 2026
D
My take from `close to the coal face` is, there is still not a lot of practical results from the big 3 CAD companies` ai powered...
Jan 14, 2026
D
This kind of discussion about whether a software advancement is really significant is always fascinating because context matters so...
Jan 14, 2026
I was always curious - was the Cobalt implementation literally just brittle and would fail at "random" times (making it look viable when...
Jan 14, 2026
10nm failure was cobalt, that's why it was walked back in subsequent nodes.
Jan 14, 2026
One minor addition - Intel did make another "serious" attempt to grow the iGPU into something more substantial in 2015 -- the...
Jan 14, 2026
Pat did agree to reverse a possible design only course Swan opened and so tried to rescue the company as an IDM+Foundry. Besides...
Jan 14, 2026
The “Not TSMC” foundry market does give Intel some potential breathing room. But that market is not reserved for Intel alone.
On mature...
Jan 14, 2026
Like.
From what we've seen the wafer cost increase with N2 is bigger than the die area saving compared to N3, so for the same function an N2...
Xebec replied to the thread Lip-Bu Tan Update on 18A and 14A.I was always curious - was the Cobalt implementation literally just brittle and would fail at "random" times (making it look viable when...