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Figure: Overview of the headquarters of companies publishing patents related to hybrid bonding (Source: Hybrid Bonding Patent Landscape report, Knowmade, September 2024)
TongFu’s patenting activity related to hybrid bonding
TongFu MicroElectronics, formerly known as Nantong Fujitsu Microelectronics (NFME), has a long-standing presence in the advanced semiconductor packaging industry. Patent analysis reveals that the company has been active in the Fan-Out packaging field since 2011, with a significant acceleration in patent filings in 2022. It now rivals with other outsourced semiconductor assembly and testing (OSAT) companies like JCET, ASE, SPIL, Huatian, and SJSemi in this Fan-Out IP landscape. Since 2022, TongFu has ventured into the hybrid bonding IP landscape, with over 30 pending patent applications to date. Its claimed inventions are primarily related to semiconductor structure/device fabrication, integrating hybrid bonding as one of the steps rather than focusing on the hybrid bonding process itself. While most patent applications are filed in China, the company has shown interest in enforcing its legal rights in Europe, as evidenced by at least four patent filings targeting Europe through ongoing PCT procedures (WO2023/104092, WO2023/104094, WO2023/104095, WO2023/104097). TongFu‘s hybrid bonding IP strategy appears to mirror its approach in the Fan-Out segment, with most patents being filed in China and only a few directed towards other countries, specifically Europe and the U.S.
Hybrid bonding technology has become crucial for 2.5D/3D Fan-Out packaging and 3D-stacked memory developed by TongFu. Most of its patents describe techniques for fan-out packaging which involve hybrid bonding technology for stacking multiple chips (WO2023/104094, WO2023/104097, CN115527868, CN114188316, CN115732475). The inventions propose combining dummy chips, conductive through holes, and silicon interposers with wafer-level hybrid bonding techniques to achieve high-density, ultra-thin, multi-layer chip packages. The solutions described in these patents enhance mechanical stability, prevent warping, and reduce package thickness while improving electrical performance and heat dissipation. By integrating heterogeneous chips efficiently, TongFu’s claimed inventions also increase packaging versatility and reliability. Regarding the high-bandwidth memory (HBM), TongFu utilizes hybrid bonding to vertically stack memory chips and mount the 3D-stacked memory onto a substrate (WO2023/104092, CN114464542, CN114203564, CN114171414). These inventions propose combining advanced solutions such as hybrid bonding with dummy and buffer chips, conductive through holes, and heat dissipation structures, all aimed at improving data throughput, thermal management, and mechanical stability in memory packages. The resulting benefits include higher memory capacity, increased data transfer rates, and enhanced reliability, all within a more compact and efficient package. Additionally, another patent discloses a method for separating a hybrid bonding wafer, which allows the separation of adjacent chip sets without damaging the hybrid bonding interface (CN114758952). The method involves dry etching along a specific direction from both sides of the wafer assembly to create grooves that intersect with the hybrid bonding interface.
Hybrid bonding technology has become crucial for 2.5D/3D Fan-Out packaging and 3D-stacked memory developed by TongFu. Most of its patents describe techniques for fan-out packaging which involve hybrid bonding technology for stacking multiple chips (WO2023/104094, WO2023/104097, CN115527868, CN114188316, CN115732475). The inventions propose combining dummy chips, conductive through holes, and silicon interposers with wafer-level hybrid bonding techniques to achieve high-density, ultra-thin, multi-layer chip packages. The solutions described in these patents enhance mechanical stability, prevent warping, and reduce package thickness while improving electrical performance and heat dissipation. By integrating heterogeneous chips efficiently, TongFu’s claimed inventions also increase packaging versatility and reliability. Regarding the high-bandwidth memory (HBM), TongFu utilizes hybrid bonding to vertically stack memory chips and mount the 3D-stacked memory onto a substrate (WO2023/104092, CN114464542, CN114203564, CN114171414). These inventions propose combining advanced solutions such as hybrid bonding with dummy and buffer chips, conductive through holes, and heat dissipation structures, all aimed at improving data throughput, thermal management, and mechanical stability in memory packages. The resulting benefits include higher memory capacity, increased data transfer rates, and enhanced reliability, all within a more compact and efficient package. Additionally, another patent discloses a method for separating a hybrid bonding wafer, which allows the separation of adjacent chip sets without damaging the hybrid bonding interface (CN114758952). The method involves dry etching along a specific direction from both sides of the wafer assembly to create grooves that intersect with the hybrid bonding interface.
TongFu’s IP signals a strong drive towards high-end semiconductor packaging
TongFu’s intellectual property, which combines hybrid bonding technology with fan-out packaging and 3D memory stacking, gives the company a significant advantage in assembling semiconductor devices with higher integration density, performance, and energy efficiency. The development of a patent portfolio related to hybrid bonding, coupled with its joint venture and strategic partnership with AMD, supports TongFu’s ambition to advance in the fabrication of high-performance semiconductor packaging for premium applications, such as AI and HPC, where faster processing speeds and increased data capacity are critical.
Read full article: https://www.knowmade.com/technology...to-bolster-its-advanced-packaging-activities/
Read full article: https://www.knowmade.com/technology...to-bolster-its-advanced-packaging-activities/