Author: Emma Stein | Publication Date: June 18, 2026, 8:02 AM
Samsung is actively preparing for its next-generation 1d DRAM process technology, which is expected to enter mass production as early as the end of 2027. This is Samsung's next-generation memory process after 1c DRAM, equivalent to Micron's 1-delta node.
With the advent of the AI era, memory has gone from being a "supporting role" to becoming one of the core bottlenecks, and high-end AI GPUs continue to increase their requirements for high bandwidth memory (HBM).
Samsung's latest DRAM chips are manufactured using 1c DRAM technology, which heavily relies on EUV lithography and metal gates. They are also used in HBM4 high-bandwidth memory, targeting the AI/HPC high-bandwidth memory market.
Unlike the current 1c DRAM, 1d DRAM will adopt a brand-new structure of vertically stacked capacitors. This is also a major shift in the history of DRAM manufacturing from horizontal arrangement to vertical integration. It is expected to further improve the storage density and power efficiency per unit area, which is key to the high-bandwidth, low-power memory required for future AI training and inference.
In addition, 1d DRAM will also use dual-wafer bonding technology, where the memory array and peripheral control circuitry are separated and then integrated on different wafers to improve process flexibility and performance.
According to South Korean media citing industry sources, Samsung plans to introduce dedicated 1d equipment into its production lines before the second quarter of 2027. If R&D and equipment calibration go smoothly, mass production is expected to begin by the end of 2027.
The 1d process will become the watershed of the next generation of technology. Whether Samsung can advance the mass production of 1d DRAM as scheduled in 2027 will directly affect the company's competitive position in the HBM5E market.
Reference: Samsung targets late 2027 for 1d DRAM mass production, racing to power next-gen HBM5 AI memory
technews.tw
Samsung is actively preparing for its next-generation 1d DRAM process technology, which is expected to enter mass production as early as the end of 2027. This is Samsung's next-generation memory process after 1c DRAM, equivalent to Micron's 1-delta node.
With the advent of the AI era, memory has gone from being a "supporting role" to becoming one of the core bottlenecks, and high-end AI GPUs continue to increase their requirements for high bandwidth memory (HBM).
Samsung's latest DRAM chips are manufactured using 1c DRAM technology, which heavily relies on EUV lithography and metal gates. They are also used in HBM4 high-bandwidth memory, targeting the AI/HPC high-bandwidth memory market.
Unlike the current 1c DRAM, 1d DRAM will adopt a brand-new structure of vertically stacked capacitors. This is also a major shift in the history of DRAM manufacturing from horizontal arrangement to vertical integration. It is expected to further improve the storage density and power efficiency per unit area, which is key to the high-bandwidth, low-power memory required for future AI training and inference.
In addition, 1d DRAM will also use dual-wafer bonding technology, where the memory array and peripheral control circuitry are separated and then integrated on different wafers to improve process flexibility and performance.
According to South Korean media citing industry sources, Samsung plans to introduce dedicated 1d equipment into its production lines before the second quarter of 2027. If R&D and equipment calibration go smoothly, mass production is expected to begin by the end of 2027.
The 1d process will become the watershed of the next generation of technology. Whether Samsung can advance the mass production of 1d DRAM as scheduled in 2027 will directly affect the company's competitive position in the HBM5E market.
Reference: Samsung targets late 2027 for 1d DRAM mass production, racing to power next-gen HBM5 AI memory
三星加速布局 1D DRAM，目標 2027 年底量產鎖定 HBM5 應用
三星正積極準備下一代 1d DRAM 製程技術，預計最快 2027 年底進入量產階段，這是三星繼 1c DRAM 之後下一代記憶體製程，相當於美光（Micron）1-delta 節點。 AI 時代來臨，記憶體重要性已從「配角」變成核心瓶頸之一，高階 AI GPU 對高頻寬記憶體（HBM） 的規格要求...
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