Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/huawei-plans-1-4-nm-chips-by-2031-kirin-2026-chip-238-mtr-mm2-transistor-density-rivaling-tsmc%E2%80%99s-3nm.25154/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2031070
            [XFI] => 1060170
        )

    [wordpress] => /var/www/html
)

Huawei plans 1.4-nm chips by 2031, Kirin 2026 Chip: 238 MTr/mm2 transistor density rivaling TSMC’s 3nm

Fred Chen

Moderator
In a major bid to bypass crippling U.S. technology sanctions, China’s Huawei Technologies has unveiled an ambitious semiconductor roadmap, projecting the design of high-end chips with a transistor density equivalent to a 1.4-nanometer (1.4-nm) process node by 2031.

The announcement was made on Monday, May 25, 2026, by He Tingbo—President of Huawei’s HiSilicon semiconductor division and chair of the company’s Scientist Committee—during a keynote speech at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS) in Shanghai.

1. The Strategy: Sidestepping Traditional Moore’s Law

Because Washington has strictly blocked China’s access to advanced Extreme Ultraviolet (EUV) lithography equipment from ASML, Chinese foundries cannot easily manufacture chips using traditional geometric shrinking.

To overcome this, Huawei introduced a new architectural framework called the Tau ($\tau$) Scaling Law (referred to by some industry peers as He’s Law).

  • Time Over Geometry: Traditional chip scaling relies on making transistors physically smaller (node scaling). The Tau Scaling Law flips the script by focusing on system-level efficiency scaling—specifically cutting down the time (latency) it takes for data and electronic signals to propagate through devices, circuits, and systems.​
  • The LogicFolding Solution: Alongside the scaling law, Huawei unveiled its LogicFolding architecture. This design dramatically shortens the physical wiring inside a chip, reducing resistive and capacitive loads. By stacking silicon and optimizing internal interconnects, Huawei claims it can mimic the performance and transistor density of a 1.4-nm node without requiring the tight sub-atomic physical engraving of Western foundries.​

2. Slicing Open the Roadmap: 2026 to 2031

Huawei stressed that this isn’t just a theoretical research paper. The company claims it has quietly designed and mass-produced 381 distinct chips over the past six years utilizing early variations of this system-level architecture.

The upcoming deployment schedule aims to directly challenge Western silicon pacesetters:


1779687357709.png

3. Industry Realism vs. Geopolitical Insulations

Independent semiconductor analysts view Huawei’s 1.4-nm equivalent target with a mix of fascination and caution.

On one hand, tech firms like TSMC are already targeting true, native 1.4-nm physical mass production by 2028. Huawei’s 2031 timeline for density equivalence means China will technically remain a few years behind the absolute global manufacturing frontier. Furthermore, Huawei has not yet published independent, third-party performance or toxicological yield data to validate its laboratory benchmarks.

On the other hand, industry experts from firms like Omdia point out that system-level scaling—relying on advanced packaging, 3D chiplet stacking, and signal path compression—is a highly credible way to squeeze bleeding-edge performance out of older, legally available manufacturing equipment. By formalizing the Tau Scaling Law, Huawei is building a vital blueprint to insulate China’s domestic AI, smartphone, and supercomputing infrastructure from future Western trade embargoes.

 
Just saw this: https://www.huaweicentral.com/huawei-kirin-2026-chip/

1779700359827.png


Huawei has revealed its Kirin 2026 details and it reveals massive upgrade in the chip architecture including transistor density.

He Tingbo, Director and President of Semiconductor Business, revealed the Tao (τ) Law for chip and electronics systems, while saying that the first Kirin chip with this new design will launch later this year. As shown by the Huawei leader, the Kirin 2026 chip will mark the start of new era, designed with new LogicFolding architecture.

Compared to the 2D design practice, the LogicFolding design, increases transistor density by 53.5%, adding 238 MTR/square millimeter. It means, 238 million transistors can be integrated per square millimeter of chip area. That’s theoratically on par with Intel’s 18A and TSMC’s 3nm process technology.

It is revealed that the chip’s performance core has improved by 41% and the maximum frequency has been improved by 12.7%, twice comparerd to last generation.

Research and Development​

Huawei said that the new chip breakthrough is a result of consistent innovation. It has been testing the LogicFolding design for the past six years. It has designed and mass produced 381 chip for smartphones, AI and other key platforms and devices.

With future developments, the chip is expected to achieve massive transistors density, achieving 1.4 nm process technology by 2031.

Kirin 2026 launch​

Huawei has announced that the new Kirin will make a debut with smartphones launching in fall of 2026, bringing massive performance upgrade.

Though, the company didn’t confirm the device, but it’s likely to be the Huawei Mate 90 series. Huawei has been launching its latest chip innovation with this lineup for the past 4 years and this year isn’t going to be any different.

However, this time around, the company could openly call it a real performance breakthrough, which has been under high scrutiny from the U.S. government. Huawei Mate 90 series will launch in the fall of 2026 with new upgrades but new Kirin chip is likely to be its biggest highlight.
 
I wonder if this means they have stopped physical scaling.

Uneducated SWAG -- I'd guess no, because it's proven that smaller transistors can still perform (avaialble via EUV), so it's more likely that they're just scaling extremely slowly now being stuck on DUV.
 
I can't believe people fell for Huwaei marketing they changed how they calculated density metric. they are calculating it by 2/(CPP*CH) x Design Utilization which is different from how it is calculated so they are clearly wrong lol
1779712105746.png
 
Uneducated SWAG -- I'd guess no, because it's proven that smaller transistors can still perform (avaialble via EUV), so it's more likely that they're just scaling extremely slowly now being stuck on DUV.
They have the ability to catch up, they just have to port their M2 to the same pitch as their M0. But with the speaker's emphasis on time instead of geometry scaling, it suggested they want to change the game.
 
I can't believe people fell for Huwaei marketing they changed how they calculated density metric. they are calculating it by 2/(CPP*CH) x Design Utilization which is different from how it is calculated so they are clearly wrong lol
View attachment 4611
I don't know if there has been a generally or widely accepted formula. I use 1.474/(CPP*cell height), it would be near the upper end of the D_design shown above. It comes from 60% NAND2 (3 CPP wide), 40% Flip flop (19 CPP wide).
 
FWIW - Ian Cuttress (Moore than Moore / TechTechPotato) and George from Chips and Cheese are discussing this live right now:

 
toxicological yield data to validate its laboratory benchmarks.
Has Huawei figured out how to put even nastier chemicals and element into their chips and chipmaking than the current array of Arsenic, Cadmium, Arsine, Phosphine, Diborane, Silane, Hydrofluoric Acid, Tetramethylammonium Hydroxide, and basic Benzene ?

Toxicological yield data typically refers to the analytical measurement of specific toxicants produced or emitted from a substance (such as smoke, vapor, or chemical extracts) correlated with dose-response thresholds. This data is used to calculate risk indices and safe exposure levels.
 
Back
Top