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I appreciate the response to my first post on this process, but still would like to know how much this will reduce the cost of chips and if will lead to an increase in the use of high end chips? Any additional thoughts and comments would be appreciated.
This will not really increase the amount of higher end chips. If your time had the budget to design those kind of chips and your design could effectively scale to new nodes you did it. From what is publicly known about this tool from AMATs disclosure and the whitepaper Fred linked, my gut says this tool will be more expensive than normal etch tools and the nature of this technique won’t make it especially fast either. If we see the big three logic and dram players make extensive use of this tool we could see slight cost per wafer reductions from what it might have otherwise been on “2nm” class nodes and beyond, but I wouldn’t expect “2nm” nodes to suddenly get way cheaper than “3nm” nodes because of this technology.
