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One of the persistent cost and size challenges in AESA radar T/R module design is the front-end channel itself. A conventional discrete implementation — GaN PA die, GaAs LNA die, PIN diode T/R switch, matching networks, bias circuitry, and associated passives — consumes significant PCB real estate and introduces multiple impedance interfaces that need careful management. At X-band, where element spacing runs approximately 15 mm at 10 GHz, this overhead becomes a hard constraint: the front-end electronics for each T/R channel must fit within a footprint defined by the antenna array geometry, not by what is convenient to assemble.
Front-end module (FEM) integration — combining PA, LNA, and T/R switch on a single GaN die — directly addresses this constraint. The architectural choice eliminates inter-chip interconnects, reduces matching network complexity, and allows the impedance transformation between PA output and LNA input to be optimized at the die level rather than at the board level. The tradeoff is design complexity: co-designing a high-power transmit path and a low-noise receive path on the same die, sharing the same substrate, requires careful isolation and switch design to prevent transmit power from degrading receive noise figure during the RX phase.
VSI's VPF FEM family at X-band represents our production implementation of this architecture, developed on a GaN-on-SiC 250nm process through WIN Semiconductors. This article covers the architecture choices behind the VPF1005 (5W, >37 dBm) and VPF1010 (10W, >40 dBm), and discusses where the tradeoffs land for typical AESA seeker, fire control, and UAV radar applications.
Architecture: what goes on the die
Both VPF1005 and VPF1010 integrate three functional blocks in a QFN 7×5 mm package. The transmit path is a GaN HEMT power amplifier staged for the target output power — a two-stage design for VPF1005 and a three-stage design for VPF1010 to reach the additional 3 dB output power while maintaining PAE above 30%. The receive path is a GaN LNA with input-referred noise figure below 3 dB across the 8–11 GHz band. The T/R switch is a reflective SPDT implemented in GaN, sharing the substrate with the PA and LNA.
The choice to implement the T/R switch in GaN rather than using a separate PIN diode or GaAs switch die deserves explanation. GaN SPDT switches on the same process as the PA and LNA eliminate one chip-to-chip interface in the transmit path and one in the receive path, reducing insertion loss and package parasitics. The isolation achievable with a GaN switch at X-band — typically greater than 25 dB in switch-off state — is sufficient for the duty cycles encountered in pulsed radar applications. For CW applications such as LEO Satcom user terminals, a FEM architecture with integrated T/R switch is generally replaced by separate PA and LNA with a diplexer, which is why the VPF series is positioned specifically for pulsed radar.
Transmit path: PA design choices
GaN-on-SiC 250nm offers a breakdown voltage well above 100V and an RF current density that enables the output power levels required for AESA T/R module applications at reasonable die area. For VPF1005, the PA is sized to deliver greater than 37 dBm saturated output power across the 8–11 GHz band at a 28V drain supply. Power-added efficiency exceeds 30% at saturation — an important specification for phased array applications where aggregate DC power consumption across hundreds or thousands of T/R channels determines thermal management requirements and overall system power budget.
VPF1010 targets greater than 40 dBm saturated output power — the additional 3 dB requires approximately doubling the output device periphery, with corresponding impact on die area and input drive requirements. Gain from input to PA output exceeds 25 dB, allowing direct drive from beamformer IC outputs without an intermediate driver stage in most phased array architectures.
At silicon level, measured Pout across the band shows [insert measured Pout vs. frequency plot data from characterization report here — 9 GHz, 9.5 GHz, 10 GHz, 10.5 GHz] with less than [X dB] variation across the band, confirming the matching network design is achieving broadband performance rather than a narrow peak.
Receive path: noise figure and LNA-switch isolation
The LNA in both VPF1005 and VPF1010 achieves noise figure below 3 dB across 8–11 GHz with greater than 20 dB gain. For a phased array receiver, LNA noise figure is the dominant contributor to system noise figure when the antenna and switch loss ahead of the LNA are accounted for — a 1 dB improvement in LNA NF translates directly to 1 dB improvement in radar detection range at constant transmit power, or allows a corresponding reduction in transmit power for the same detection range.
The critical integration challenge is switch-to-LNA isolation during the transmit phase. In TX mode, the T/R switch must route transmit power to the antenna port while presenting a high impedance to the LNA input. Insufficient isolation results in transmit signal leaking into the LNA, potentially driving it into compression or — in extreme cases — damaging it. The VPF design achieves greater than 25 dB TX-to-RX isolation in switch-off state, sufficient for the transmit power levels and pulse duty cycles of X-band radar applications with standard limiter configurations.
Package and integration considerations
Both VPF1005 and VPF1010 are packaged in QFN 7×5 mm. The package choice reflects the element spacing constraint at X-band: a 7×5 mm outline fits within the 15 mm element spacing at 10 GHz with margin for the beamformer IC and passive components. The QFN package provides a solderable ground plane on the bottom for direct board mounting and thermal conduction to the PCB or cold plate.
Compared to a discrete implementation of the same PA + LNA + switch function at X-band, the integrated FEM approach reduces board area by approximately 60–70%, eliminates three chip-to-chip wire bonds or flip-chip interconnects, and reduces the number of matching network elements required. For a 256-element phased array with one T/R channel per element, this difference represents significant savings in board space, assembly complexity, and points of potential failure.
Application fit: VPF1005 vs VPF1010
The choice between VPF1005 and VPF1010 in a T/R module design typically comes down to total array EIRP requirement and per-element power budget. For seeker radar applications where the total array aperture is constrained by the missile diameter and element count runs to 256–512, VPF1005's 37 dBm per element provides sufficient EIRP for target detection at 10–20 km range with practical array configurations. For airborne fire control radar where apertures run to 1,000+ elements and standoff detection range requirements are measured in hundreds of kilometers, VPF1010's 40 dBm per element, aggregated across a larger array, enables the higher peak EIRP required.
Both parts are silicon-proven and available as production-qualified IP through Design & Reuse. Deliverables include GDSII layout on WIN Semiconductors 250nm GaN-on-SiC process, S-parameter models, large-signal behavioral models, layout-extracted netlist, integration guide, and full characterization data from production silicon runs.
Note on integration with VSI's beamformer IC
For design teams building a complete T/R channel, VSI's VBF1044 X-band 4T4R beamformer IC (CMOS, LGA 7×7 mm) is characterized to interface directly with the VPF FEM input. The beamformer output power level is matched to VPF PA input requirements, and the 4-channel architecture maps to four T/R channels per BFIC, which simplifies the channel count arithmetic for typical array tile designs.
→ Technical datasheet and S-parameter models: available via D&R listing or direct request to VSI engineering team (Design & Reuse Viettel IP - link)
VSI — Viettel Semiconductor is a fabless semiconductor IP design company based in Hanoi, Vietnam, and the semiconductor arm of Viettel Group.
Technical inquiries: Email: minhnq43@viettel.com.vn / WhatsApp: +84965125018
Front-end module (FEM) integration — combining PA, LNA, and T/R switch on a single GaN die — directly addresses this constraint. The architectural choice eliminates inter-chip interconnects, reduces matching network complexity, and allows the impedance transformation between PA output and LNA input to be optimized at the die level rather than at the board level. The tradeoff is design complexity: co-designing a high-power transmit path and a low-noise receive path on the same die, sharing the same substrate, requires careful isolation and switch design to prevent transmit power from degrading receive noise figure during the RX phase.
VSI's VPF FEM family at X-band represents our production implementation of this architecture, developed on a GaN-on-SiC 250nm process through WIN Semiconductors. This article covers the architecture choices behind the VPF1005 (5W, >37 dBm) and VPF1010 (10W, >40 dBm), and discusses where the tradeoffs land for typical AESA seeker, fire control, and UAV radar applications.
Architecture: what goes on the die
Both VPF1005 and VPF1010 integrate three functional blocks in a QFN 7×5 mm package. The transmit path is a GaN HEMT power amplifier staged for the target output power — a two-stage design for VPF1005 and a three-stage design for VPF1010 to reach the additional 3 dB output power while maintaining PAE above 30%. The receive path is a GaN LNA with input-referred noise figure below 3 dB across the 8–11 GHz band. The T/R switch is a reflective SPDT implemented in GaN, sharing the substrate with the PA and LNA.
The choice to implement the T/R switch in GaN rather than using a separate PIN diode or GaAs switch die deserves explanation. GaN SPDT switches on the same process as the PA and LNA eliminate one chip-to-chip interface in the transmit path and one in the receive path, reducing insertion loss and package parasitics. The isolation achievable with a GaN switch at X-band — typically greater than 25 dB in switch-off state — is sufficient for the duty cycles encountered in pulsed radar applications. For CW applications such as LEO Satcom user terminals, a FEM architecture with integrated T/R switch is generally replaced by separate PA and LNA with a diplexer, which is why the VPF series is positioned specifically for pulsed radar.
Transmit path: PA design choices
GaN-on-SiC 250nm offers a breakdown voltage well above 100V and an RF current density that enables the output power levels required for AESA T/R module applications at reasonable die area. For VPF1005, the PA is sized to deliver greater than 37 dBm saturated output power across the 8–11 GHz band at a 28V drain supply. Power-added efficiency exceeds 30% at saturation — an important specification for phased array applications where aggregate DC power consumption across hundreds or thousands of T/R channels determines thermal management requirements and overall system power budget.
VPF1010 targets greater than 40 dBm saturated output power — the additional 3 dB requires approximately doubling the output device periphery, with corresponding impact on die area and input drive requirements. Gain from input to PA output exceeds 25 dB, allowing direct drive from beamformer IC outputs without an intermediate driver stage in most phased array architectures.
At silicon level, measured Pout across the band shows [insert measured Pout vs. frequency plot data from characterization report here — 9 GHz, 9.5 GHz, 10 GHz, 10.5 GHz] with less than [X dB] variation across the band, confirming the matching network design is achieving broadband performance rather than a narrow peak.
Receive path: noise figure and LNA-switch isolation
The LNA in both VPF1005 and VPF1010 achieves noise figure below 3 dB across 8–11 GHz with greater than 20 dB gain. For a phased array receiver, LNA noise figure is the dominant contributor to system noise figure when the antenna and switch loss ahead of the LNA are accounted for — a 1 dB improvement in LNA NF translates directly to 1 dB improvement in radar detection range at constant transmit power, or allows a corresponding reduction in transmit power for the same detection range.
The critical integration challenge is switch-to-LNA isolation during the transmit phase. In TX mode, the T/R switch must route transmit power to the antenna port while presenting a high impedance to the LNA input. Insufficient isolation results in transmit signal leaking into the LNA, potentially driving it into compression or — in extreme cases — damaging it. The VPF design achieves greater than 25 dB TX-to-RX isolation in switch-off state, sufficient for the transmit power levels and pulse duty cycles of X-band radar applications with standard limiter configurations.
Package and integration considerations
Both VPF1005 and VPF1010 are packaged in QFN 7×5 mm. The package choice reflects the element spacing constraint at X-band: a 7×5 mm outline fits within the 15 mm element spacing at 10 GHz with margin for the beamformer IC and passive components. The QFN package provides a solderable ground plane on the bottom for direct board mounting and thermal conduction to the PCB or cold plate.
Compared to a discrete implementation of the same PA + LNA + switch function at X-band, the integrated FEM approach reduces board area by approximately 60–70%, eliminates three chip-to-chip wire bonds or flip-chip interconnects, and reduces the number of matching network elements required. For a 256-element phased array with one T/R channel per element, this difference represents significant savings in board space, assembly complexity, and points of potential failure.
Application fit: VPF1005 vs VPF1010
The choice between VPF1005 and VPF1010 in a T/R module design typically comes down to total array EIRP requirement and per-element power budget. For seeker radar applications where the total array aperture is constrained by the missile diameter and element count runs to 256–512, VPF1005's 37 dBm per element provides sufficient EIRP for target detection at 10–20 km range with practical array configurations. For airborne fire control radar where apertures run to 1,000+ elements and standoff detection range requirements are measured in hundreds of kilometers, VPF1010's 40 dBm per element, aggregated across a larger array, enables the higher peak EIRP required.
Both parts are silicon-proven and available as production-qualified IP through Design & Reuse. Deliverables include GDSII layout on WIN Semiconductors 250nm GaN-on-SiC process, S-parameter models, large-signal behavioral models, layout-extracted netlist, integration guide, and full characterization data from production silicon runs.
Note on integration with VSI's beamformer IC
For design teams building a complete T/R channel, VSI's VBF1044 X-band 4T4R beamformer IC (CMOS, LGA 7×7 mm) is characterized to interface directly with the VPF FEM input. The beamformer output power level is matched to VPF PA input requirements, and the 4-channel architecture maps to four T/R channels per BFIC, which simplifies the channel count arithmetic for typical array tile designs.
→ Technical datasheet and S-parameter models: available via D&R listing or direct request to VSI engineering team (Design & Reuse Viettel IP - link)
VSI — Viettel Semiconductor is a fabless semiconductor IP design company based in Hanoi, Vietnam, and the semiconductor arm of Viettel Group.
Technical inquiries: Email: minhnq43@viettel.com.vn / WhatsApp: +84965125018