Xebec
Well-known member
I think it is great to see another automotive company leveraging an advanced node (5nm). The chip appears to have 14 x Cortex A720AE cores as a base, and some additional features to support multi-chip scaling. News sources are reporting that TSMC will fab this chip.
rivian.com
newsroom.arm.com
Rivian Autonomy Processor and Gen 3 Autonomy Computer
At the core of Rivian’s technology roadmap is the transition to in-house silicon, designed specifically for the vision-centric physical AI. The first generation Rivian Autonomy Processor (RAP1) is a custom 5nm processor that integrates processing and memory onto a single multi-chip module. This architecture delivers advanced levels of efficiency, performance, and Automotive Safety Integrity Level compliance.
RAP1 powers the company’s third-generation Autonomy computer, the Autonomy Compute Module 3 (ACM3). Key specifications of the ACM3 include:
Rivian Custom Silicon, Next-Gen Autonomy Platform, Deep AI Integration - Newsroom - Rivian
American automotive technology company showcases roadmap toward global leadership in AI-defined vehicles and ownership experience
Rivian's autonomy breakthrough built with Arm: the compute foundation for the rise of physical AI
Rivian’s new autonomy platform, powered by Arm, sets the stage for intelligent, safety-ready mobility driven by physical AI.
Rivian Autonomy Processor and Gen 3 Autonomy Computer
At the core of Rivian’s technology roadmap is the transition to in-house silicon, designed specifically for the vision-centric physical AI. The first generation Rivian Autonomy Processor (RAP1) is a custom 5nm processor that integrates processing and memory onto a single multi-chip module. This architecture delivers advanced levels of efficiency, performance, and Automotive Safety Integrity Level compliance.
RAP1 powers the company’s third-generation Autonomy computer, the Autonomy Compute Module 3 (ACM3). Key specifications of the ACM3 include:
- 1600 sparse INT8 TOPS (Trillion Operations Per Second).
- The processing power of 5 billion pixels per second.
- RAP1 features RivLink, a low latency interconnect technology allowing chips to be connected to multiply processing power, making it inherently extensible.
- RAP1 is enabled by an in-house developed AI compiler and platform software.
