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Search results

  1. F

    Huawei plans 1.4-nm chips by 2031, Kirin 2026 Chip: 238 MTr/mm2 transistor density rivaling TSMC’s 3nm

    I don't know if there has been a generally or widely accepted formula. I use 1.474/(CPP*cell height), it would be near the upper end of the D_design shown above. It comes from 60% NAND2 (3 CPP wide), 40% Flip flop (19 CPP wide).
  2. F

    Huawei plans 1.4-nm chips by 2031, Kirin 2026 Chip: 238 MTr/mm2 transistor density rivaling TSMC’s 3nm

    They have the ability to catch up, they just have to port their M2 to the same pitch as their M0. But with the speaker's emphasis on time instead of geometry scaling, it suggested they want to change the game.
  3. F

    Huawei plans 1.4-nm chips by 2031, Kirin 2026 Chip: 238 MTr/mm2 transistor density rivaling TSMC’s 3nm

    Just saw this: https://www.huaweicentral.com/huawei-kirin-2026-chip/ Huawei has revealed its Kirin 2026 details and it reveals massive upgrade in the chip architecture including transistor density. He Tingbo, Director and President of Semiconductor Business, revealed the Tao (τ) Law for chip...
  4. F

    Huawei plans 1.4-nm chips by 2031, Kirin 2026 Chip: 238 MTr/mm2 transistor density rivaling TSMC’s 3nm

    In a major bid to bypass crippling U.S. technology sanctions, China’s Huawei Technologies has unveiled an ambitious semiconductor roadmap, projecting the design of high-end chips with a transistor density equivalent to a 1.4-nanometer (1.4-nm) process node by 2031. The announcement was made on...
  5. F

    Corsair is now using Chinese DRAM in its DDR5 kits. Memory prices could finally drop.

    CXMT is also currently working on 64-layer 3D DRAM which should get them past the 0a-generation density.
  6. F

    Corsair is now using Chinese DRAM in its DDR5 kits. Memory prices could finally drop.

    May 23, 2026 - 9:37 am Story byAna Maria Constantin Corsair DDR5 modules spotted with Chinese CXMT chips as AI demand starves PCs of DRAM. Prices may fall in H2 2027 Corsair, one of the most recognisable names in PC components, is shipping DDR5 memory modules built with DRAM manufactured by...
  7. F

    Intel's Lip-Bu Tan: "B0 you keep your job, anything about that you are fired"

    Looks like extra pressure on Intel Product side, maybe to leave enough fab capacity for IFS?
  8. F

    World first: imec presents quantum dot qubit device using High NA EUV lithography

    From the scale bar, hard to believe it's 6 nm.
  9. F

    Intel CEO Lip-Bu Tan Calls Foundry a “National Treasure” as External Customers Knock on His Door After 18A Yield Turnaround

    I understand they've done speed bin splits before but never thought of those as "subpar".
  10. F

    ASML says first chips made with High-NA machines to arrive in months

    Products exposed as test vehicles. At the April 15 earnings call: https://www.morningstar.com/stocks/xwbo/asml/earnings-transcript, what he said was this: Yeah, I think, Francois-Xavier, I think it's a bit too early to answer the question. I think what we see today is that several of our...
  11. F

    ASML says first chips made with High-NA machines to arrive in months

    At the last conference call, he said it was not prime time for High-NA. Customers were still evaluating how to use in production. That should mean using product patterns as test vehicles. A big fundamental difficulty is the reduced depth of focus. That's what happens when you use higher NA...
  12. F

    Chinese memory module makers ramp up production as CXMT DDR5 breakthrough hits market

    CXMT is working on 64-layer 3D DRAM, having already made 5 layers. https://ieeexplore.ieee.org/document/11399912
  13. F

    Chinese memory module makers ramp up production as CXMT DDR5 breakthrough hits market

    Founded in 2016, CXMT is widely regarded as China’s only domestic DRAM maker to have achieved mass production Howard Liuin Beijing Published: 7:30am, 14 May 2026 Chinese memory module manufacturers are accelerating the release of consumer and enterprise storage products powered by domestic...
  14. F

    Intel Prepares HBM Killer: HB3DM Memory Stacks with Z-Angle Technology

    At IMW, it was revealed these 8-high+logic die stacks are turned on their side and stacked laterally as tiles to form an inductively coupled network of tiles.
  15. F

    SK Hynix customers offering to buy EUV machines..

    It's almost like renting SK's space for the customers' own fabs 😆
  16. F

    SK Hynix customers offering to buy EUV machines..

    Don't know why it would be SK hynix and not Samsung, TSMC, Intel, etc. Possibly looking for discounts on the DRAM?
  17. F

    Intel delays 18A schedule: manufacturing problems slow down the hopeful centerpiece of the foundry offensive

    Is High-NA even necessary for 18A? It's not supposed to be, from some of Intel's own statements.
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