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Obviously 14A is not ramping, Obviously nothing is going into Fab62 (Fab 52 is not fully tooled out yet). I will give it credit for digging into reports.
Fun Side note: So I used my Gemini to ask where the tools are going ....... wait for it.... it referenced YOUR post in THIS thread on...
The "start risk production" is for PR. Intel revenue doesnt show up until about 1 year after they claim risk production:
No 14A products out in 2027. Most likely no significantly volume out in 2028. Reminder, 18A does not have significant volume in 2026
Intel does not currently plan any...
great input.
One model, I am working on is : What is the response to these incredible DRAM price increases? OEMs are going to have to figure it out. I am not sure but prioritizing lunar lake makes sense.
This is for corporate, but for overall, : just re-checked Well over half of all PC CPUs...
I like Moorinsights.... they have good contacts. This is a good marketing presentation for Intel.
The Intel Challenge is: They have the capability to develop the most advanced processes. Do they have the capability to do it cost effectively and support external customers. we shall see.
I am...
If you want a really accurate number for tool shipments, Most sell side analysts have a tracker that looks at shipments by locations. They can track how much revenue went from Netherlands to Taiwan and in the US it is separated by state. In China it is separated by province. when I checked this...
AI is like if a really hard working person with no knowledge or intelligence summarized google searches. In some cases, it now references Facebook. In order to make it useful, one needs to apply expertise.
Some High level statements
1) Intel was a leader in EUV development. They got early...
we went through this 5 years ago with the rumors. Lets see when we get commits, tapeouts and Wafers.
And again, the issue isnt only getting customers. Can Intel break even on IFS? When will an 18A based product have positive margins?
BPSD is not packaging, it is wafer processing.... if you want to say Intel knows how to package it,... fair enough. But <1% of worlds logic wafers made in 2026 and probably even 2027 will be BPSD (obviously only Intel)
I assume by packaging, you mean CoWoS/Foveros type. Is the plan that Intel...
I wouldnt over complicate it. Micron makes the best decision at the time based on the ROI. Micron has had Development and limited production in the US, but NAND has been focused in Singapore. DRAM in Taiwan and Japan. then only change is ramping production in the US. Which is due to the Chips...
100% agree. I was asked by a Client how to change a process from BSPD to FSPD and I said, "its a different animal. I dont even think I could make a cartoon of how to do that or what the impact on cost would be". Then there is the modeling, layout, chip design.
This is also affecting Intel...
I have worked with multiple factories in Singapore. US can get within 5% on Fab wafer cost (Singapore can be expensive on many items). Subsidies, government support and skilled workforce dominate.
Micron NAND center of excellence is Singapore. and Singapore grants are equivalent or better than they best Chips act grants. Given trade uncertainty and tariffs, they best answer is Singapore.
Im just saying Intel is not constrained by TSMC, they are constrained by IFS ..... @siliconbruh999 may be correct on product issues,
being constrained when you are growing significantly, is good. Being constrained when you are flat/shrinking is not acceptable ever.
Intel is not limited on capacity from TSMC. Only IFS is a problem. and a reminder. Intel is constrained while their revenue drops. No one elses revenue is dropping.
