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The launch of Pax Silica ended the fragile trade truce established between President Trump and President Xi Jinping in November 2025. Chinese officials see the initiative as a fundamental threat to their industrial goals and a violation of that agreement’s spirit.
In response, China’s Ministry...
Taiwan’s status was one of the most closely watched aspects of the summit. As home to TSMC and a central player in the semiconductor industry, Taiwan was designated a “guest contributor” rather than a founding member. State Department officials highlighted Taiwan’s importance as a trading...
EUV lithography patterned intricate layers with small feature on a wafer using a reflective EUV mask. However, the EUV lithographic environment, often containing water vapor and hydrocarbons, introduces molecular contamination from secondary EUV electrons, degrading reflectance stability ...
Actually TSMC N7 to N5 M2 pitch shrink (40 nm to 35 nm) wasn't enough by itself to justify a node change. Gate pitch shrink was also significant for transistor density. You might say, SMIC lagged in gate pitch too much from N+2. Yet, the patterning for gate pitch won't change, so that is not the...
TSMC N6 changed diffusion break from double to single, that in itself is enough to put it above 100 MTr/mm2. So it is a noticeable jump in density from earlier 7nm. The design rules were (supposedly) the same as N7 though I think gate pitch shrunk to 54 nm to get the number below.
I had...
This article explained that some discrepancies may arise, depending on the layout assumptions, such as the ratio of NAND to Flip-Flop: https://www.angstronomics.com/p/the-truth-of-tsmc-5nm
I used the formula in that article, but actually I applied it wrongly for the 7nm generation nodes since...
Yeah, I remembered the gate pitch had been "abnormally" large, but actually it's just that SMIC density < Samsung density < TSMC density for a given process family or cluster.
My objection to TechInsights' or Jukan's spin is that the difference between TSMC's and Samsung's 5nm densities is more than the difference (or ratio) between Samsung and SMIC.
I think this characterization by TechInsights is off. The author provided me some key details. I posted only a rough version on X:
Maybe a few % is already significant in this context?
They had to go beyond the double patterning of N+2. The metal pitches are close to TSMC N5.
TechInsights has completed an exploratory teardown and process analysis of the Huawei Kirin 9030 application processor used in the new Mate 80 Pro Max. Our structural and dimensional analysis confirms that the chip is manufactured using SMIC’s N+3 process, a scaled evolution of its 7nm-class...
