Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/search/295048/?c%5Busers%5D=IanD&o=date&page=9
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Search results

  1. I

    Huawei to Use China Fab's 7nm Node to Overcome U.S. Sanctions: Report

    Anything in particular? IIRC other things like advanced tools are also embargoed, so China/SMIC/Huawei would have to have substitutes for these to go with the 7nm process -- which doesn't need blocked EUV, TSMC 7nm was all-DUV.
  2. I

    Every Government wants a fab, Does the market?

    There will undoubtedly be problems as governments around the world try to bring up local fabs, some of which Arthur mentioned. However these are probably small beer compared to the problems if everything advanced is left in Taiwan and China invades -- sorry, has a "special re-unification...
  3. I

    Solid State Battery receives safety certification

    No we can't, because semiconductor advances come from PPE improvements due to decreasing feature dimensions and new tricks like nanosheets. Solid-state batteries are a chemical improvement in construction which will give a step-up when it happens, but afterwards is likely to revert to the same...
  4. I

    Intel's Conflict of Interest? Can it overcome TSMC

    *If* Intel deliver on schedule and with TSMC-level yields. That's a very big "if" given their recent history and current position...
  5. I

    TSMC’s 3nm Output Could Reach Up To 100,000 Wafers Monthly By The End of 2023, As It Expects Huge Demand For Apple’s iPhone 15

    Indeed, because unlike Apple they don't have to roll out a new iPhone every year in time for the big Xmas market... ;-)
  6. I

    TSMC’s 3nm Output Could Reach Up To 100,000 Wafers Monthly By The End of 2023, As It Expects Huge Demand For Apple’s iPhone 15

    The "earlier report" saying Apple have 90% of 3nm shipments is (was?) true because Apple is the only big customer for N3 and N3E shipments for other customers have not ramped up yet. As soon as this happens Apple's percentage will drop off.
  7. I

    TSMC’s 3nm Output Could Reach Up To 100,000 Wafers Monthly By The End of 2023, As It Expects Huge Demand For Apple’s iPhone 15

    You could also say that without Apple's demand for a new process half-node every year to coincide with their next product rollout, TSMC would have more freedom to push out processes which coincided with notable improvements in technology than being locked into a fixed yearly timescale... ;-)...
  8. I

    TSMC’s 3nm Output Could Reach Up To 100,000 Wafers Monthly By The End of 2023, As It Expects Huge Demand For Apple’s iPhone 15

    N3 and N3E DD matches at the same process maturity, not the same date... ;-) DD nowadays is largely driven by stochastic errors (shorts/opens) or particulates, and for a centered process these will be similar for N3 and N3E. The process margin issue is that if this is too small (e.g. very tight...
  9. I

    TSMC’s 3nm Output Could Reach Up To 100,000 Wafers Monthly By The End of 2023, As It Expects Huge Demand For Apple’s iPhone 15

    All of which is why TSMC have pushed everyone except Apple onto N3E not N3 -- their stated reason for this was "improved process margin", and having seen both sets of design rules I can understand that, there are some significant changes. Defect density (DD) is not the issue, N3 and N3E are...
  10. I

    TSMC’s 3nm Output Could Reach Up To 100,000 Wafers Monthly By The End of 2023, As It Expects Huge Demand For Apple’s iPhone 15

    N3E doesn't have lower performance than N3 (which Apple are the only volume user of) but it does have lower density, because some of the design rules were relaxed to "increase process window" -- it seems TSMC did a mini-Intel and pushed N3 a bit too hard, then realized they needed to back off...
  11. I

    Nvidia CEO: Intel Test Chip Results for Next Gen Process Look Good

    That's like asking "how long is a piece of string?"... Huge chips pushing the maximum reticle size like Nvidia and Intel and Xilinx used (700mm2 or so) have the advantage of being monolithic so not needing any inter-die links, but the yield is *terrible* so the cost per mm2 of silicon is high...
  12. I

    SMIC Removes Mentions of 14nm Node: US Sanctions at Work?

    Maybe the advanced SMIC processes -- assuming they exist, especially 7nm -- are now kept under wraps and are for Chinese customers only, to try and avoid further sanctions to fab equipment/tools ?
  13. I

    Could Parallel Processes or Higher Speed replace Shrink?

    We use everything possible to reduce power -- varying Vth, low supply voltage which is adjusted to track gate delay, just-enough-maths resolution -- the datapaths are not programmable CPUs they're all custom logic. Chiplets don't really work for internal signal processing when we have data rates...
  14. I

    Could Parallel Processes or Higher Speed replace Shrink?

    In many applications power efficiency becomes the key, not just density or speed, because the power per operation is shrinking more slowly than area with each process node so power density is rising. This means the best approach is to go parallel not faster, which is exactly what's been...
  15. I

    Gemini Battery, The Ultimate Disruptor, 700 Mile Battery

    Which all sounds great, but will need a complete mental attitude change to how people see/use cars -- many are emotionally committed to owning a car, possibly a bigger/better/faster one than their neighbours, especially in the US (but many other countries as well), and I suspect they're going to...
  16. I

    Gemini Battery, The Ultimate Disruptor, 700 Mile Battery

    It's an interesting idea, pairing LFP chemistry for short-term charge/discharge with large cycle count but low energy density (400Wh/kg) with anode-free NMC for super-high energy density (1000Wh/kg) but much lower cycle count -- the LFP acts as a cache to shield the anode-free cell from most of...
  17. I

    Porsche leading Silicon Carbon Battery Push

    Except that -- like being able to charge in 5 minutes -- this doesn't really matter for most EVs, given that existing batteries are already lasting for hundreds of thousands of miles, which for typical driving is more than the life of the car -- it will make a difference for the small number of...
  18. I

    Porsche leading Silicon Carbon Battery Push

    It's not a "silicon-carbon battery", it's a lithium-ion battery with a different anode material, silicon-carbon instead of graphite. All are commonly available and cheap, it's the other battery components that are rare or expensive. So it could deliver longer life, a bit lighter weight and a...
  19. I

    Testing the bounds of loyalty for TSMC's inner circle

    That's not how it works, you'd have to subcontract it to an ASIC house (e.g. Synopsys) not the foundry. The problem is that the time/effort/cost of doing the back-end -- especially verification -- has been rising exponentially, and this now dwarfs doing the RTL which is the quick/easy/cheap bit...
  20. I

    Highest number of pins

    The optics with CPO *are* on chiplets with 2.5D (high-density on-substrate) connections to the switch chips...
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