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Rapidus Accelerates 1nm Push, Reportedly Targets Six-Month Gap with TSMC

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Japan’s Rapidus is accelerating its push into advanced chipmaking. According to Nikkei XTech, CTO Kazunari Ishimaru said the company is aiming to narrow its technology gap with TSMC to around six months at the 1nm node.

In parallel, another Nikkei XTech report notes that Rapidus plans to begin development of 1.4nm semiconductor manufacturing technology in 2026, with mass production reportedly targeted for around 2029.

By comparison, according to Economic Daily News, TSMC’s 1nm process may be deployed earlier at its Central Taiwan Science Park facility, with the first fab expected to complete risk trial production by the end of 2027 and enter mass production in the second half of 2028.

................................................

https://www.trendforce.com/news/202...h-reportedly-targets-six-month-gap-with-tsmc/
 
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According to reports, Rapidus has a pilot line running 2nm technology now. Full process. Mass production in 2027.

If they have mass production in 2027, they must have technology full developed and runing chips (not test wafers). correct?

Is there a solid PDK?

Any time someone talks about the next technolgy before releasing the current one, it is a red flag IMO.
 
This article doesn't track, I'm wondering if it's an AI article. It first says that Rapidus is ~ aiming to narrow it's gap to 6 months vs TSMC.

But then says it will release 1.4nm to mass production in 2029; 1 year after TSMC plans to enter mass production of 1.0nm in 2028. One year earlier and one node ahead.. (on paper 1.0nm vs 1.4nm).
 
Japan’s Rapidus is accelerating its push into advanced chipmaking. According to Nikkei XTech, CTO Kazunari Ishimaru said the company is aiming to narrow its technology gap with TSMC to around six months at the 1nm node.

In parallel, another Nikkei XTech report notes that Rapidus plans to begin development of 1.4nm semiconductor manufacturing technology in 2026, with mass production reportedly targeted for around 2029.

By comparison, according to Economic Daily News, TSMC’s 1nm process may be deployed earlier at its Central Taiwan Science Park facility, with the first fab expected to complete risk trial production by the end of 2027 and enter mass production in the second half of 2028.

https://www.trendforce.com/news/202...h-reportedly-targets-six-month-gap-with-tsmc/

Generally you see Rapidus talking to investors and customers, two very different audiences. The 1nm talk is all about investors. Keep shoveling me money Investors so we can get to 1nm. Of course Rapidus has to mention TSMC because that is the gold standard, that is what investors understand. We must catch TSMC! Will Rapidus get close to TSMC at 1nm? No they will not but hey we all must have dreams especially if we are asking for money. Samsung Foundry chased TMSC and failed, GlobalFoundries chased TSMC and failed, Intel Foundry chased TSMC twice and failed.

The Rapidus 2nm talk is to customers, hopefully customers who want a TSMC alliterative due to tight capacity. Unfortunately Intel 18A is in HVM, TSMC N2 is in HVM, and Samsung 2F is in their own version of HVM (bad yield). Samsung sells good die instead of wafers so yield is not a factor. Brilliant move but only an IDM foundry can hide yield that way. TSMC and GlobalFoundries could not get away with that type of financial Harry Potter financial wand waving stuff.
 
The inspection/repair and mask making folks must be rubbing their hands at these prospects, gonna be some good business to be had!

Or is Semicon still made up of only 2 companies TSMC and ASML?
 
The 1.4nm (Post-2nm) development for Rapidus is driven by a specialized ecosystem where LSTC (Design/Soft) and AIST (Infrastructure/Hard) divide the technical responsibilities.

LSTC (Leading-edge Semiconductor Technology Center) serves as the R&D hub, defining technical specifications and roadmaps for 1.4nm. Acting as a bridge to IBM and imec, LSTC leads the development of advanced GAA structures and Backside Power Delivery. The Japanese government has already allocated $300 million specifically for this post-2nm R&D phase.

AIST (National Institute of Advanced Industrial Science and Technology) provides the physical infrastructure to validate LSTC’s designs. AIST is constructing a new research facility immediately adjacent to the Rapidus IIM fab in Chitose, Hokkaido. This site will house an ASML High-NA EUV lithography system (EXE series) to be owned and operated by AIST. The investment for this High-NA tool alone is estimated between $400 million and $500 million.

This division of labor—LSTC providing the "process recipe" while AIST operates the High-NA EUV tools in Chitose—allows Rapidus to focus on its 2nm ramp-up while simultaneously advancing 1.4nm development next door. Total government funding for this integrated infrastructure exceeds $3.3 billion.
 
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