Robert Maire
Moderator
Tick Tock Tock Tock....WTFOCK?
View attachment 16904
Intel officially renounced its Tick Tock strategy on paper in its most recent 10K after the reality of the 10nm delay set in a while ago (which we were first on the street to report..) . At the time it sounded like a unique , one time slip, as the company said it would get back on a two year cadence from the slipped Tick Tock Tock, 3 year cadence of 14nm. That is no longer the case as the company has permanently shifted to a 3 phase cadence "process/architecture/optimization" from "process/architecture" (as graphically publicized in the most recent 10K).
Optimization seems to be code for "milk more out of the huge amount of money you have invested in capex & R&D".
While we think this is the correct approach in the new world of a declining PC market, getting more out of less, the stretching out of two years of capex spend into three years obviously has a negative impact on Intels capex spend and on tool companies.
While process and architecture seem to have a somewhat defined length of time, "optimization" sounds like a very open ended statement akin to saying keep squeezing until no more comes out.
This seems to imply that the next technology node, 10nm or 7nm can be pushed out as far as Intel deems needed rather than introduced on a specific cadence schedule.
While there hasn't been a change in the publicly scheduled H2 2017 roll out of 10nm, we think that Intel can throttle spending to match near term industry conditions.
If this sounds familiar, its what TSMC has been doing forever.
Given that the normally slow Q1 , post partum, post holiday spending downturn was worse than normal this year, particularly in the PC segment , we would not be overly surprised to see Intel back off a bit on capex spending to do "real time" adjustments to capex.
Maybe 10nm remains on time for Intel but perhaps not as fully built out with a lower number of wafer starts based on reduced demand outlook.
We think this adds to the overall risk of the bulk of the 10nm ramp slipping a bit.
TSMC & Samsung soldier on......
TSMC & Samsung seem to be continuing their aggressive pursuit of 10nm. TSMC has Apple demand behind it while Samsung has Qualcomm and internal demand.
As we have pointed out numerous times before , 10nm, or slightly thereafter, continues to look like the intercept point where Intel and TSMC technology cross paths.
Before we get any nasty emails, we would be the first to point out that Intel's 10nm is more advanced than TSMC's 10nm, so its a bit of an apples and oranges comparison.
Tick Tick+....
TSMC at 16nm has had what might be referred a "Tick and Tick+". Essentially two process iterations, a first iteration of 16nm followed by a process tweak of 16nm+.
Using this comparison, its likely that TSMC's 10nm will not equal Intels 10nm but TSMC's 10nm+ might be very comparable. The open question is how quickly with TSMC be able to follow on its initial 10nm offering with its "tweak" of 10nm to catch Intel.
So far spending at both TSMC & Samsung as well as scheduling seems strong but the capacity build out at 10nm could be throttled by the buying response to the Iphone 7 and its "tweaked 16nm" TSMC processor. TSMC is especially good at matching spend to demand.
TSMC's spending timing is much more defined than Intels, because TSMC has to follow the yearly cadence of Apple's September Iphone rollout and has to get 10nm ready for a June ramp in 2017 to build CPU's for the 7S (or whatever it will be called) to be released in September of 2017.
It is amusing to see this "role reversal" as it used to be Intel on a strict Moore's law schedule and TSMC swinging the breeze and now Intel seems open ended with "optimization" while TSMC remains in lockstep with Apples yearly offerings.
Samsung memory side likely more variable
While Samsung's logic side has to "keep up with the Jonses" at 10nm to remain competitive there is likely less pressure on the memory side given Samsung's lead. There is certainly a strong wave of 3D NAND spend but memory pricing is notoriously variable and consumer sensitive.
If there is a place for downside risk at Samsung it will likely be on the memory side.
EUV HVM - like trying to accelerate on an icy road ...
As we had reported from SPIE in February, we were less than impressed by this years reported progress in EUV. While power levels keep improving, the industry only now seems to be seriously looking at the "ecosystem" needed to support HVM. Resists with good line edge roughness, defect free reticle blanks, in situ cleaning, reticle inspection, pellicles and a long list of other bottleneck issues. Not a lot of "closure" on most of these issues (lots of good presentations and papers though...
It was not that long ago that ASML was talking about getting a piece of the 10nm pie for EUV and capturing most all of 7nm. The talk around town now seems to be getting a piece of 7nm and hoping to capture most of 5nm.
Quad patterning is a fore gone conclusion at this point. Back up plans and alternatives for EUV availability seem to be talked about more as a reality than a choice. All the major semiconductor manufacturers were very non-commital about the EUV insertion point deferring to "when its ready".
ASML is still crying all the way to the bank as it still gets to sell a ton of immersion scanners instead. If you want to make a dep & etch salesperson melt in orgasmic bliss, just whisper the words "octo patterning" into their ear. A year or two ago we joked about octo patterning....who will be the first to use it??
KLAC, LRCX & AMAT etc;
Given that metrology and yield management tools are among the first to be bought in a new technology node, KLAC's reported huge order intake should come as no surprise in front of the 10nm wave. Dep and etch tools come later in the 10nm cycle as capacity orders kick in to fill out fab after you get the process down. This is obviously whats expected later in 2016 as the 10nm ramp picks up speed.
As mentioned earlier in this note we think there is a chance of some orders slipping a bit deeper into the year like Q4 but some chip makers, most specifically TSMC likely can't delay much at all.
Pricing related share shifts?
We remain concerned about some share shift from Lam to AMAT on the etch side, as we have mentioned in previous notes, while we think Lam is doing better on their dep side in the near term. We are concerned about AMAT getting aggressive on price to try to gain share and ramp their top line faster even if at the expense of the bottom line.
Obviously market share changes occur mainly at technology node changes (you tend not to lose business once you are designed in) and given that all three semiconductor leaders are changing at a similar timeframe there is opportunity for a lot of share battles.
A bounce off the December bottom....then what??
Its clear from most in the industry that December was pretty much the bottom of business. We have had a nice bounce off the bottom but we don't expect a linear continuation of a similar percentage increase in the next two quarters. More likely flattish to slightly up couple of quarters before we see a sustained ramp late in the year related to 10nm build out.
We would caution that investors could get anxious waiting for the ramp and we could see the stocks pull back once or twice as the market gets nervous especially about macro tech industry trends while waiting for the real ramp.
The other risk is that the ramp is not as big as expected as wafer starts are not built out to expected levels in light of weaker end user demand.
Right now, we maintain that the downside beta is higher than the upside beta as the expectation of a strong H2 ramp has been hyped by most of the sell side. As we have seen over the last five years or so the typically overly bullish predictions of "a ramp in the next half a year" usually haven't panned out as expected only to have ramps pushed out or expectations lowered. We have had some good runs but not nearly as many as most had hoped for or predicted.
Given that this a a more volatile election year and fears on both PC and smart phone sales have increased of late, we would pay close attention to any signs of change in momentum through the year.
- Expected H2 10nm spending ramp may push into Q4
- Although progressing, EUV HVM still slips out
- Weak end market demand may crimp volume buys
View attachment 16904
Intel officially renounced its Tick Tock strategy on paper in its most recent 10K after the reality of the 10nm delay set in a while ago (which we were first on the street to report..) . At the time it sounded like a unique , one time slip, as the company said it would get back on a two year cadence from the slipped Tick Tock Tock, 3 year cadence of 14nm. That is no longer the case as the company has permanently shifted to a 3 phase cadence "process/architecture/optimization" from "process/architecture" (as graphically publicized in the most recent 10K).
Optimization seems to be code for "milk more out of the huge amount of money you have invested in capex & R&D".
While we think this is the correct approach in the new world of a declining PC market, getting more out of less, the stretching out of two years of capex spend into three years obviously has a negative impact on Intels capex spend and on tool companies.
While process and architecture seem to have a somewhat defined length of time, "optimization" sounds like a very open ended statement akin to saying keep squeezing until no more comes out.
This seems to imply that the next technology node, 10nm or 7nm can be pushed out as far as Intel deems needed rather than introduced on a specific cadence schedule.
While there hasn't been a change in the publicly scheduled H2 2017 roll out of 10nm, we think that Intel can throttle spending to match near term industry conditions.
If this sounds familiar, its what TSMC has been doing forever.
Given that the normally slow Q1 , post partum, post holiday spending downturn was worse than normal this year, particularly in the PC segment , we would not be overly surprised to see Intel back off a bit on capex spending to do "real time" adjustments to capex.
Maybe 10nm remains on time for Intel but perhaps not as fully built out with a lower number of wafer starts based on reduced demand outlook.
We think this adds to the overall risk of the bulk of the 10nm ramp slipping a bit.
TSMC & Samsung soldier on......
TSMC & Samsung seem to be continuing their aggressive pursuit of 10nm. TSMC has Apple demand behind it while Samsung has Qualcomm and internal demand.
As we have pointed out numerous times before , 10nm, or slightly thereafter, continues to look like the intercept point where Intel and TSMC technology cross paths.
Before we get any nasty emails, we would be the first to point out that Intel's 10nm is more advanced than TSMC's 10nm, so its a bit of an apples and oranges comparison.
Tick Tick+....
TSMC at 16nm has had what might be referred a "Tick and Tick+". Essentially two process iterations, a first iteration of 16nm followed by a process tweak of 16nm+.
Using this comparison, its likely that TSMC's 10nm will not equal Intels 10nm but TSMC's 10nm+ might be very comparable. The open question is how quickly with TSMC be able to follow on its initial 10nm offering with its "tweak" of 10nm to catch Intel.
So far spending at both TSMC & Samsung as well as scheduling seems strong but the capacity build out at 10nm could be throttled by the buying response to the Iphone 7 and its "tweaked 16nm" TSMC processor. TSMC is especially good at matching spend to demand.
TSMC's spending timing is much more defined than Intels, because TSMC has to follow the yearly cadence of Apple's September Iphone rollout and has to get 10nm ready for a June ramp in 2017 to build CPU's for the 7S (or whatever it will be called) to be released in September of 2017.
It is amusing to see this "role reversal" as it used to be Intel on a strict Moore's law schedule and TSMC swinging the breeze and now Intel seems open ended with "optimization" while TSMC remains in lockstep with Apples yearly offerings.
Samsung memory side likely more variable
While Samsung's logic side has to "keep up with the Jonses" at 10nm to remain competitive there is likely less pressure on the memory side given Samsung's lead. There is certainly a strong wave of 3D NAND spend but memory pricing is notoriously variable and consumer sensitive.
If there is a place for downside risk at Samsung it will likely be on the memory side.
EUV HVM - like trying to accelerate on an icy road ...
As we had reported from SPIE in February, we were less than impressed by this years reported progress in EUV. While power levels keep improving, the industry only now seems to be seriously looking at the "ecosystem" needed to support HVM. Resists with good line edge roughness, defect free reticle blanks, in situ cleaning, reticle inspection, pellicles and a long list of other bottleneck issues. Not a lot of "closure" on most of these issues (lots of good presentations and papers though...
It was not that long ago that ASML was talking about getting a piece of the 10nm pie for EUV and capturing most all of 7nm. The talk around town now seems to be getting a piece of 7nm and hoping to capture most of 5nm.
Quad patterning is a fore gone conclusion at this point. Back up plans and alternatives for EUV availability seem to be talked about more as a reality than a choice. All the major semiconductor manufacturers were very non-commital about the EUV insertion point deferring to "when its ready".
ASML is still crying all the way to the bank as it still gets to sell a ton of immersion scanners instead. If you want to make a dep & etch salesperson melt in orgasmic bliss, just whisper the words "octo patterning" into their ear. A year or two ago we joked about octo patterning....who will be the first to use it??
KLAC, LRCX & AMAT etc;
Given that metrology and yield management tools are among the first to be bought in a new technology node, KLAC's reported huge order intake should come as no surprise in front of the 10nm wave. Dep and etch tools come later in the 10nm cycle as capacity orders kick in to fill out fab after you get the process down. This is obviously whats expected later in 2016 as the 10nm ramp picks up speed.
As mentioned earlier in this note we think there is a chance of some orders slipping a bit deeper into the year like Q4 but some chip makers, most specifically TSMC likely can't delay much at all.
Pricing related share shifts?
We remain concerned about some share shift from Lam to AMAT on the etch side, as we have mentioned in previous notes, while we think Lam is doing better on their dep side in the near term. We are concerned about AMAT getting aggressive on price to try to gain share and ramp their top line faster even if at the expense of the bottom line.
Obviously market share changes occur mainly at technology node changes (you tend not to lose business once you are designed in) and given that all three semiconductor leaders are changing at a similar timeframe there is opportunity for a lot of share battles.
A bounce off the December bottom....then what??
Its clear from most in the industry that December was pretty much the bottom of business. We have had a nice bounce off the bottom but we don't expect a linear continuation of a similar percentage increase in the next two quarters. More likely flattish to slightly up couple of quarters before we see a sustained ramp late in the year related to 10nm build out.
We would caution that investors could get anxious waiting for the ramp and we could see the stocks pull back once or twice as the market gets nervous especially about macro tech industry trends while waiting for the real ramp.
The other risk is that the ramp is not as big as expected as wafer starts are not built out to expected levels in light of weaker end user demand.
Right now, we maintain that the downside beta is higher than the upside beta as the expectation of a strong H2 ramp has been hyped by most of the sell side. As we have seen over the last five years or so the typically overly bullish predictions of "a ramp in the next half a year" usually haven't panned out as expected only to have ramps pushed out or expectations lowered. We have had some good runs but not nearly as many as most had hoped for or predicted.
Given that this a a more volatile election year and fears on both PC and smart phone sales have increased of late, we would pay close attention to any signs of change in momentum through the year.
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